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Re: [PATCH] S/390: Remove support for the hexdecimal floating point format
- From: Andreas Krebbel <Andreas dot Krebbel at de dot ibm dot com>
- To: Ulrich Weigand <uweigand at de dot ibm dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Fri, 4 May 2007 12:06:25 +0200
- Subject: Re: [PATCH] S/390: Remove support for the hexdecimal floating point format
- References: <20070420135938.GA28021@blc4eb430604175.ibm.com> <200704201425.l3KEPbdY009215@d12av02.megacenter.de.ibm.com>
Hi Ulrich,
> As a minor follow-on cleanup, could you change in:
>
> > ! (define_expand "fix_trunc<mode>si2"
> > [(set (match_operand:SI 0 "register_operand" "")
> > ! (fix:SI (match_operand:DSF 1 "nonimmediate_operand" "")))]
> > "TARGET_HARD_FLOAT"
> > {
> > ! operands[1] = force_reg (<MODE>mode, operands[1]);
> > ! emit_insn (gen_fix_trunc<mode>si2_bfp (operands[0], operands[1], GEN_INT (5)));
> > DONE;
> > })
>
> the operand 1 predicate to register_operand and then remove
> the force_reg? That's a left-over from when we wanted to
> allow memory operands for the IBM-float case.
Sure.
Bootstrapped on s390 and s390x.
No testsuite regressions.
Bye,
-Andreas-
2007-05-04 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.md ("fix_trunc<mode>di2", "fix_trunc<mode>si2"):
Expanders removed.
("fix_trunc<DSF:mode><GPR:mode>2"): Expander added.
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig 2007-04-25 10:19:49.000000000 +0200
--- gcc/config/s390/s390.md 2007-05-03 15:11:51.000000000 +0200
***************
*** 3269,3282 ****
DONE;
})
! (define_expand "fix_trunc<mode>di2"
! [(set (match_operand:DI 0 "register_operand" "")
! (fix:DI (match_operand:DSF 1 "nonimmediate_operand" "")))]
! "TARGET_64BIT && TARGET_HARD_FLOAT"
{
! operands[1] = force_reg (<MODE>mode, operands[1]);
! emit_insn (gen_fix_trunc<mode>di2_bfp (operands[0], operands[1],
! GEN_INT (5)));
DONE;
})
--- 3269,3281 ----
DONE;
})
! (define_expand "fix_trunc<DSF:mode><GPR:mode>2"
! [(set (match_operand:GPR 0 "register_operand" "")
! (fix:GPR (match_operand:DSF 1 "register_operand" "")))]
! "TARGET_HARD_FLOAT"
{
! emit_insn (gen_fix_trunc<DSF:mode><GPR:mode>2_bfp (operands[0], operands[1],
! GEN_INT (5)));
DONE;
})
***************
*** 3331,3349 ****
"TARGET_HARD_FLOAT"
"")
- ;
- ; fix_trunc(df|sf)si2 instruction pattern(s).
- ;
-
- (define_expand "fix_trunc<mode>si2"
- [(set (match_operand:SI 0 "register_operand" "")
- (fix:SI (match_operand:DSF 1 "nonimmediate_operand" "")))]
- "TARGET_HARD_FLOAT"
- {
- operands[1] = force_reg (<MODE>mode, operands[1]);
- emit_insn (gen_fix_trunc<mode>si2_bfp (operands[0], operands[1], GEN_INT (5)));
- DONE;
- })
;
; float(si|di)(tf|df|sf|td|dd)2 instruction pattern(s).
--- 3330,3335 ----