RE: [PING] [m32c] mul and div insn

["Naveen H.S." <naveen dot hs at kpitcummins dot com>]

Hi DJ,

>> Immediate operands are always VOIDmode.  Why did you add modes to
>> those operands?
A testcase (regression) used the operand that was far greater then the 
expected value which resulted in error. So I used the MODE to validate
that
a given constant is valid for the specific mode. I am retaining it only
for 
the case(mulhisi3_c) which resulted in error.

>> HL_REGS is not the right class for r2r0 and r3r1.  Use R03 for that
DONE.

>> Divide cannot use different registers for operands 0 and 1.  You must
>> use a matching constraint for operand 1.
DONE.

Please find attached the modified patch "muldiv.patch.tar.bz2" as per
your
comments.

No new regressions found.

ChangeLog
2007-05-02   Naveen.H.S <naveen.hs@kpitcummins.com>

	* config/m32c/muldiv.md (mulhisi3_c): Limit the mode of the 2nd 
	operand to HI mode.
	(mulsi3): New.
	(divsi3): New.
	(udivsi3): New.

Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA) 

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Attachment: muldiv.patch.tar.bz2
Description: muldiv.patch.tar.bz2