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PATCH: turn off SLOW_BYTE_ACCESS for mips16
- From: Sandra Loosemore <sandra at codesourcery dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Sat, 28 Apr 2007 09:13:10 -0400
- Subject: PATCH: turn off SLOW_BYTE_ACCESS for mips16
I've verified that this patch does, in fact, produce smaller code on the CSiBE
benchmarks.
Total code size when compiling with -mips16 -Os: before 2875065, after 2873805.
OK to commit?
-Sandra
2007-04-28 Sandra Loosemore <sandra@codesourcery.com>
Nigel Stephens <nigel@mips.com>
gcc/
* config/mips/mips.h (SLOW_BYTE_ACCESS): Turn off for MIPS16.
Index: gcc/config/mips/mips.h
===================================================================
*** gcc/config/mips/mips.h (revision 169885)
--- gcc/config/mips/mips.h (working copy)
*************** typedef struct mips_args {
*** 2281,2288 ****
difference in cost between byte and (aligned) word loads.
On RISC machines, it tends to generate better code to define
! this as 1, since it avoids making a QI or HI mode register. */
! #define SLOW_BYTE_ACCESS 1
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */
--- 2281,2291 ----
difference in cost between byte and (aligned) word loads.
On RISC machines, it tends to generate better code to define
! this as 1, since it avoids making a QI or HI mode register.
!
! But, generating word accesses for -mips16 is generally bad as shifts
! (often extended) would be needed for byte accesses. */
! #define SLOW_BYTE_ACCESS (!TARGET_MIPS16)
/* Define this to be nonzero if shift instructions ignore all but the low-order
few bits. */