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Re: [RFC PATCH, vectorizer]: Vectorize int -> double conversions


On 4/23/07, Uros Bizjak <ubizjak@gmail.com> wrote:
Hello!

Attached (RFC!) patch implements vectorization of int -> double
conversion. The testcase:

  /* int -> double */
  for (i = 0; i < N; i++)
    {
      da[i] = (double) ib[i];
    }

compiles on i686 -msse2 target into:

.L3:
        movdqa  (%eax,%ecx), %xmm0
        cvtdq2pd        %xmm0, %xmm1
        pshufd  $238, %xmm0, %xmm0
        movapd  %xmm1, (%edx,%eax,2)
        cvtdq2pd        %xmm0, %xmm0
        movapd  %xmm0, 16(%edx,%eax,2)
        addl    $16, %eax
        cmpl    $128, %eax
        jne     .L3

(pshufd is there to shuffle SImode vector from x0x1x2x3 into x2x3x2x3.

Regarding the patch: in vectorizable_conversion() we detect
(nunits_out == nunits_in / 2) as EXPAND case and handle conversion in
the same way as vectorizable_type_promotion(). Unfortunatelly, we need
a couple of new tree codes and 4 new optabs to handle signed and
unsigned conversion.


Dorit, are there any common architectures which support odd size promotions?
If so, maybe VEC_UNPACK_FLOAT{HI,LOW} should simply be
VEC_UNPACK_FLOAT, specifying the start and length into the vector in
it's operands.

Then you can use HI/LOW optabs if the size == vec_size /2 and the
start pos == 0 || vec_size/2 (and there is no better vec_unpack optab)





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