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[RFC] Convert PowerPC calls to hard link register
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 15 Mar 2007 11:15:24 -0400
- Subject: [RFC] Convert PowerPC calls to hard link register
The PowerPC port historically has modeled the link register in the
insn stream as a pseudo that is allocated to LR by reload from the link
register class. This apparently was due to a limitation in reload
preventing it from spilling pseudos that are allocated to hard registers
also mentioned explicitly in the insn stream, IIUC. Bernd Schmidt
contributed some improvements to reload in 1998 that was suppose to
address this limitation.
On the dataflow branch, the use of a pseudo register causes
problems because sibcall patterns generate USEs of a pseudo not associated
with a previous SET. Naked USEs of hard registers are allowed, but the LR
pseudo does not become a hard register until after reload. All recent
ports for architectures with a similar LR feature represent the link
register as a hard register in call patterns.
I tried performing a partial conversion, but that caused ICEs in
reload during GCC bootstrap because it was unable to find a spill
register. Reload does not seem to be fully corrected or the fix only
applied to SMALL_REGISTER_CLASS targets. Therefore, I needed to bite the
bullet and convert the entire port to explicit LR references.
SPEC CPU2000 testing of the patch shows some consistent
performance impact around the 1% range, both positive and negative.
Overall it appears to be a wash. The impact on performance is slightly
surprising to me, but GCC's register allocation is what it is.
Appended is the patch. I plan to check it tomorrow if there is no
objection.
I especially would appreciate Darwin maintainers to look over
those changes. load_macho_picbase is the only pattern that treats LR as
Pmode and uses an expander to distinguish instead of choosing the
appropriate pattern at the single call site. I retained the LR operand
(changed to hard register), but the operand is ignored when the
appropriate mode is chosen. This maintains the form of th pattern RTL.
David
* config/rs6000/darwin.md (load_macho_picbase): Ignore operand 0.
(load_macho_picbase_{si,di}): Convert to LR hard reg.
* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Remove
LR pseudo.
(rs6000_emit_load_toc_table): Same.
* config/rs6000/altivec.md (restore_world): Convert to LR hard reg.
* config/rs6000/rs6000.md (mulh_call): Convert to LR hard reg.
(mull_call): Same.
(divss_call): Same.
(divus_call): Same.
(quoss_call): Same.
(quous_call): Same.
(load_toc_v4_pic_si): Same
(load_toc_v4_PIC_1): Same.
(load_toc_v4_PIC_1b): Same.
(call_indirect_aix{32,64}): Same.
(call_value_indirect_aix{32,64}): Same.
(call): Same.
(call_value): Same.
(call_local{32,64}): Same.
(call_value_local{32,64}): Same.
(call_indirect_nonlocal_aix{32,64}): Same.
(call_nonlocal_aix{32,64}): Same.
(call_value_indirect_nonlocal_aix{32,64}): Same.
(call_value_nonlocal_aix{32,64}): Same.
(call_indirect_nonlocal_sysv<mode>): Same.
(call_nonlocal_sysv<mode>): Same.
(call_value_indirect_nonlocal_sysv<mode>): Same.
(call_value_nonlocal_sysv<mode>): Same.
(sibcall): Same.
(sibcall_local{32,64}): Same.
(sibcall_value_local{32,64}): Same.
(sibcall_nonlocal_aix{32,64}): Same.
(sibcall_value_nonlocal_aix{32,64}): Same.
(sibcall_nonlocal_sysv<mode>): Same.
(sibcall_value): Same.
(sibcall_value_nonlocal_sysv<mode>): Same.
Index: darwin.md
===================================================================
*** darwin.md (revision 122639)
--- darwin.md (working copy)
*************** Boston, MA 02110-1301, USA. */
*** 245,272 ****
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
{
if (TARGET_32BIT)
! emit_insn (gen_load_macho_picbase_si (operands[0], operands[1]));
else
! emit_insn (gen_load_macho_picbase_di (operands[0], operands[1]));
DONE;
})
(define_insn "load_macho_picbase_si"
! [(set (match_operand:SI 0 "register_operand" "=l")
! (unspec:SI [(match_operand:SI 1 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
! "bcl 20,31,%1\\n%1:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "load_macho_picbase_di"
! [(set (match_operand:DI 0 "register_operand" "=l")
! (unspec:DI [(match_operand:DI 1 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
! "bcl 20,31,%1\\n%1:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
--- 245,272 ----
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
{
if (TARGET_32BIT)
! emit_insn (gen_load_macho_picbase_si (operands[1]));
else
! emit_insn (gen_load_macho_picbase_di (operands[1]));
DONE;
})
(define_insn "load_macho_picbase_si"
! [(set (reg:SI 65)
! (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
! "bcl 20,31,%0\\n%0:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "load_macho_picbase_di"
! [(set (reg:DI 65)
! (unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
! "bcl 20,31,%0\\n%0:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
Index: rs6000.c
===================================================================
*** rs6000.c (revision 122639)
--- rs6000.c (working copy)
*************** rs6000_legitimize_tls_address (rtx addr,
*** 3445,3461 ****
rs6000_emit_move (got, gsym, Pmode);
else
{
! rtx tempLR, tmp3, mem;
rtx first, last;
- tempLR = gen_reg_rtx (Pmode);
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
tmp3 = gen_reg_rtx (Pmode);
mem = gen_const_mem (Pmode, tmp1);
! first = emit_insn (gen_load_toc_v4_PIC_1b (tempLR, gsym));
! emit_move_insn (tmp1, tempLR);
emit_move_insn (tmp2, mem);
emit_insn (gen_addsi3 (tmp3, tmp1, tmp2));
last = emit_move_insn (got, tmp3);
--- 3445,3461 ----
rs6000_emit_move (got, gsym, Pmode);
else
{
! rtx tmp3, mem;
rtx first, last;
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
tmp3 = gen_reg_rtx (Pmode);
mem = gen_const_mem (Pmode, tmp1);
! first = emit_insn (gen_load_toc_v4_PIC_1b (gsym));
! emit_move_insn (tmp1,
! gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
emit_move_insn (tmp2, mem);
emit_insn (gen_addsi3 (tmp3, tmp1, tmp2));
last = emit_move_insn (got, tmp3);
*************** rs6000_emit_load_toc_table (int fromprol
*** 13989,13995 ****
if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic)
{
char buf[30];
! rtx lab, tmp1, tmp2, got, tempLR;
ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
lab = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
--- 13989,13995 ----
if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic)
{
char buf[30];
! rtx lab, tmp1, tmp2, got;
ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
lab = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
*************** rs6000_emit_load_toc_table (int fromprol
*** 14003,14015 ****
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
}
! tempLR = (fromprolog
! ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
! : gen_reg_rtx (Pmode));
! insn = emit_insn (gen_load_toc_v4_PIC_1 (tempLR, lab));
if (fromprolog)
rs6000_maybe_dead (insn);
! insn = emit_move_insn (tmp1, tempLR);
if (fromprolog)
rs6000_maybe_dead (insn);
insn = emit_insn (gen_load_toc_v4_PIC_3b (tmp2, tmp1, got, lab));
--- 14003,14013 ----
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
}
! insn = emit_insn (gen_load_toc_v4_PIC_1 (lab));
if (fromprolog)
rs6000_maybe_dead (insn);
! insn = emit_move_insn (tmp1,
! gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
if (fromprolog)
rs6000_maybe_dead (insn);
insn = emit_insn (gen_load_toc_v4_PIC_3b (tmp2, tmp1, got, lab));
*************** rs6000_emit_load_toc_table (int fromprol
*** 14021,14043 ****
}
else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 1)
{
! rtx tempLR = (fromprolog
! ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
! : gen_reg_rtx (Pmode));
!
! insn = emit_insn (gen_load_toc_v4_pic_si (tempLR));
if (fromprolog)
rs6000_maybe_dead (insn);
! insn = emit_move_insn (dest, tempLR);
if (fromprolog)
rs6000_maybe_dead (insn);
}
else if (TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2)
{
char buf[30];
- rtx tempLR = (fromprolog
- ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
- : gen_reg_rtx (Pmode));
rtx temp0 = (fromprolog
? gen_rtx_REG (Pmode, 0)
: gen_reg_rtx (Pmode));
--- 14019,14035 ----
}
else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 1)
{
! insn = emit_insn (gen_load_toc_v4_pic_si ());
if (fromprolog)
rs6000_maybe_dead (insn);
! insn = emit_move_insn (dest,
! gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
if (fromprolog)
rs6000_maybe_dead (insn);
}
else if (TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2)
{
char buf[30];
rtx temp0 = (fromprolog
? gen_rtx_REG (Pmode, 0)
: gen_reg_rtx (Pmode));
*************** rs6000_emit_load_toc_table (int fromprol
*** 14052,14060 ****
ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
symL = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
! rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR,
! symF)));
! rs6000_maybe_dead (emit_move_insn (dest, tempLR));
rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0, dest,
symL,
symF)));
--- 14044,14053 ----
ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
symL = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
! rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (symF)));
! rs6000_maybe_dead (emit_move_insn (dest,
! gen_rtx_REG (Pmode,
! LINK_REGISTER_REGNUM)));
rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0, dest,
symL,
symF)));
*************** rs6000_emit_load_toc_table (int fromprol
*** 14064,14071 ****
rtx tocsym;
tocsym = gen_rtx_SYMBOL_REF (Pmode, toc_label_name);
! emit_insn (gen_load_toc_v4_PIC_1b (tempLR, tocsym));
! emit_move_insn (dest, tempLR);
emit_move_insn (temp0, gen_rtx_MEM (Pmode, dest));
}
insn = emit_insn (gen_addsi3 (dest, temp0, dest));
--- 14057,14065 ----
rtx tocsym;
tocsym = gen_rtx_SYMBOL_REF (Pmode, toc_label_name);
! emit_insn (gen_load_toc_v4_PIC_1b (tocsym));
! emit_move_insn (dest,
! gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
emit_move_insn (temp0, gen_rtx_MEM (Pmode, dest));
}
insn = emit_insn (gen_addsi3 (dest, temp0, dest));
Index: altivec.md
===================================================================
*** altivec.md (revision 122639)
--- altivec.md (working copy)
***************
*** 319,325 ****
(define_insn "*restore_world"
[(match_parallel 0 "restore_world_operation"
[(return)
! (use (match_operand:SI 1 "register_operand" "l"))
(use (match_operand:SI 2 "call_operand" "s"))
(clobber (match_operand:SI 3 "gpc_reg_operand" "=r"))])]
"TARGET_MACHO && (DEFAULT_ABI == ABI_DARWIN) && TARGET_32BIT"
--- 319,325 ----
(define_insn "*restore_world"
[(match_parallel 0 "restore_world_operation"
[(return)
! (use (reg:SI 65))
(use (match_operand:SI 2 "call_operand" "s"))
(clobber (match_operand:SI 3 "gpc_reg_operand" "=r"))])]
"TARGET_MACHO && (DEFAULT_ABI == ABI_DARWIN) && TARGET_32BIT"
Index: rs6000.md
===================================================================
*** rs6000.md (revision 122639)
--- rs6000.md (working copy)
***************
*** 2713,2719 ****
(lshiftrt:DI (mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4)))
(const_int 32))))
! (clobber (match_scratch:SI 0 "=l"))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mulh"
[(set_attr "type" "imul")])
--- 2713,2719 ----
(lshiftrt:DI (mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4)))
(const_int 32))))
! (clobber (reg:SI 65))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mulh"
[(set_attr "type" "imul")])
***************
*** 2722,2728 ****
[(set (reg:DI 3)
(mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4))))
! (clobber (match_scratch:SI 0 "=l"))
(clobber (reg:SI 0))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mull"
--- 2722,2728 ----
[(set (reg:DI 3)
(mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4))))
! (clobber (reg:SI 65))
(clobber (reg:SI 0))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mull"
***************
*** 2733,2739 ****
(div:SI (reg:SI 3) (reg:SI 4)))
(set (reg:SI 4)
(mod:SI (reg:SI 3) (reg:SI 4)))
! (clobber (match_scratch:SI 0 "=l"))
(clobber (reg:SI 0))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __divss"
--- 2733,2739 ----
(div:SI (reg:SI 3) (reg:SI 4)))
(set (reg:SI 4)
(mod:SI (reg:SI 3) (reg:SI 4)))
! (clobber (reg:SI 65))
(clobber (reg:SI 0))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __divss"
***************
*** 2744,2750 ****
(udiv:SI (reg:SI 3) (reg:SI 4)))
(set (reg:SI 4)
(umod:SI (reg:SI 3) (reg:SI 4)))
! (clobber (match_scratch:SI 0 "=l"))
(clobber (reg:SI 0))
(clobber (match_scratch:CC 1 "=x"))
(clobber (reg:CC 69))]
--- 2744,2750 ----
(udiv:SI (reg:SI 3) (reg:SI 4)))
(set (reg:SI 4)
(umod:SI (reg:SI 3) (reg:SI 4)))
! (clobber (reg:SI 65))
(clobber (reg:SI 0))
(clobber (match_scratch:CC 1 "=x"))
(clobber (reg:CC 69))]
***************
*** 2755,2761 ****
(define_insn "quoss_call"
[(set (reg:SI 3)
(div:SI (reg:SI 3) (reg:SI 4)))
! (clobber (match_scratch:SI 0 "=l"))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __quoss"
[(set_attr "type" "idiv")])
--- 2755,2761 ----
(define_insn "quoss_call"
[(set (reg:SI 3)
(div:SI (reg:SI 3) (reg:SI 4)))
! (clobber (reg:SI 65))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __quoss"
[(set_attr "type" "idiv")])
***************
*** 2763,2769 ****
(define_insn "quous_call"
[(set (reg:SI 3)
(udiv:SI (reg:SI 3) (reg:SI 4)))
! (clobber (match_scratch:SI 0 "=l"))
(clobber (reg:SI 0))
(clobber (match_scratch:CC 1 "=x"))
(clobber (reg:CC 69))]
--- 2763,2769 ----
(define_insn "quous_call"
[(set (reg:SI 3)
(udiv:SI (reg:SI 3) (reg:SI 4)))
! (clobber (reg:SI 65))
(clobber (reg:SI 0))
(clobber (match_scratch:CC 1 "=x"))
(clobber (reg:CC 69))]
***************
*** 10482,10488 ****
[(set_attr "type" "load")])
(define_insn "load_toc_v4_pic_si"
! [(set (match_operand:SI 0 "register_operand" "=l")
(unspec:SI [(const_int 0)] UNSPEC_TOC))]
"DEFAULT_ABI == ABI_V4 && flag_pic == 1 && TARGET_32BIT"
"bl _GLOBAL_OFFSET_TABLE_@local-4"
--- 10482,10488 ----
[(set_attr "type" "load")])
(define_insn "load_toc_v4_pic_si"
! [(set (reg:SI 65)
(unspec:SI [(const_int 0)] UNSPEC_TOC))]
"DEFAULT_ABI == ABI_V4 && flag_pic == 1 && TARGET_32BIT"
"bl _GLOBAL_OFFSET_TABLE_@local-4"
***************
*** 10490,10510 ****
(set_attr "length" "4")])
(define_insn "load_toc_v4_PIC_1"
! [(set (match_operand:SI 0 "register_operand" "=l")
! (match_operand:SI 1 "immediate_operand" "s"))
! (use (unspec [(match_dup 1)] UNSPEC_TOC))]
"TARGET_ELF && DEFAULT_ABI != ABI_AIX
&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"
! "bcl 20,31,%1\\n%1:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "load_toc_v4_PIC_1b"
! [(set (match_operand:SI 0 "register_operand" "=l")
! (unspec:SI [(match_operand:SI 1 "immediate_operand" "s")]
UNSPEC_TOCPTR))]
"TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"
! "bcl 20,31,$+8\\n\\t.long %1-$"
[(set_attr "type" "branch")
(set_attr "length" "8")])
--- 10490,10510 ----
(set_attr "length" "4")])
(define_insn "load_toc_v4_PIC_1"
! [(set (reg:SI 65)
! (match_operand:SI 0 "immediate_operand" "s"))
! (use (unspec [(match_dup 0)] UNSPEC_TOC))]
"TARGET_ELF && DEFAULT_ABI != ABI_AIX
&& (flag_pic == 2 || (flag_pic && TARGET_SECURE_PLT))"
! "bcl 20,31,%0\\n%0:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "load_toc_v4_PIC_1b"
! [(set (reg:SI 65)
! (unspec:SI [(match_operand:SI 0 "immediate_operand" "s")]
UNSPEC_TOCPTR))]
"TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2"
! "bcl 20,31,$+8\\n\\t.long %0-$"
[(set_attr "type" "branch")
(set_attr "length" "8")])
***************
*** 10610,10616 ****
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (scratch:SI))])]
"TARGET_32BIT"
"
{ operands[2] = gen_reg_rtx (SImode); }")
--- 10610,10616 ----
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (reg:SI 65))])]
"TARGET_32BIT"
"
{ operands[2] = gen_reg_rtx (SImode); }")
***************
*** 10632,10638 ****
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (scratch:SI))])]
"TARGET_64BIT"
"
{ operands[2] = gen_reg_rtx (DImode); }")
--- 10632,10638 ----
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (reg:SI 65))])]
"TARGET_64BIT"
"
{ operands[2] = gen_reg_rtx (DImode); }")
***************
*** 10655,10661 ****
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (scratch:SI))])]
"TARGET_32BIT"
"
{ operands[3] = gen_reg_rtx (SImode); }")
--- 10655,10661 ----
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (reg:SI 65))])]
"TARGET_32BIT"
"
{ operands[3] = gen_reg_rtx (SImode); }")
***************
*** 10678,10684 ****
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (scratch:SI))])]
"TARGET_64BIT"
"
{ operands[3] = gen_reg_rtx (DImode); }")
--- 10678,10684 ----
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (reg:SI 65))])]
"TARGET_64BIT"
"
{ operands[3] = gen_reg_rtx (DImode); }")
***************
*** 10688,10694 ****
[(parallel [(call (mem:SI (match_operand 0 "address_operand" ""))
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
! (clobber (scratch:SI))])]
""
"
{
--- 10688,10694 ----
[(parallel [(call (mem:SI (match_operand 0 "address_operand" ""))
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
! (clobber (reg:SI 65))])]
""
"
{
***************
*** 10758,10764 ****
(call (mem:SI (match_operand 1 "address_operand" ""))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
! (clobber (scratch:SI))])]
""
"
{
--- 10758,10764 ----
(call (mem:SI (match_operand 1 "address_operand" ""))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
! (clobber (reg:SI 65))])]
""
"
{
***************
*** 10838,10844 ****
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (clobber (match_scratch:SI 3 "=l,l"))]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
"*
{
--- 10838,10844 ----
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (clobber (reg:SI 65))]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
"*
{
***************
*** 10857,10863 ****
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (clobber (match_scratch:SI 3 "=l,l"))]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
"*
{
--- 10857,10863 ----
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (clobber (reg:SI 65))]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
"*
{
***************
*** 10877,10883 ****
(call (mem:SI (match_operand:SI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (clobber (match_scratch:SI 4 "=l,l"))]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
"*
{
--- 10877,10883 ----
(call (mem:SI (match_operand:SI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (clobber (reg:SI 65))]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
"*
{
***************
*** 10898,10904 ****
(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (clobber (match_scratch:SI 4 "=l,l"))]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
"*
{
--- 10898,10904 ----
(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (clobber (reg:SI 65))]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
"*
{
***************
*** 10927,10933 ****
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (match_scratch:SI 2 "=l,l"))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
--- 10927,10933 ----
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (reg:SI 65))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
***************
*** 10937,10943 ****
[(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (clobber (match_scratch:SI 3 "=l"))]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
--- 10937,10943 ----
[(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (clobber (reg:SI 65))]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
***************
*** 10952,10958 ****
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (match_scratch:SI 2 "=l,l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
--- 10952,10958 ----
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (reg:SI 65))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
***************
*** 10962,10968 ****
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (clobber (match_scratch:SI 3 "=l"))]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
--- 10962,10968 ----
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (clobber (reg:SI 65))]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
***************
*** 10978,10984 ****
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (match_scratch:SI 3 "=l,l"))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
--- 10978,10984 ----
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (reg:SI 65))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
***************
*** 10989,10995 ****
(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (clobber (match_scratch:SI 4 "=l"))]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
--- 10989,10995 ----
(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (clobber (reg:SI 65))]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
***************
*** 11005,11011 ****
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (match_scratch:SI 3 "=l,l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
--- 11005,11011 ----
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (reg:SI 65))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
***************
*** 11016,11022 ****
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (clobber (match_scratch:SI 4 "=l"))]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
--- 11016,11022 ----
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (clobber (reg:SI 65))]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
***************
*** 11034,11040 ****
[(call (mem:SI (match_operand:P 0 "register_operand" "c,*l,c,*l"))
(match_operand 1 "" "g,g,g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
! (clobber (match_scratch:SI 3 "=l,l,l,l"))]
"DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN"
{
--- 11034,11040 ----
[(call (mem:SI (match_operand:P 0 "register_operand" "c,*l,c,*l"))
(match_operand 1 "" "g,g,g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
! (clobber (reg:SI 65))]
"DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN"
{
***************
*** 11053,11059 ****
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (clobber (match_scratch:SI 3 "=l,l"))]
"(DEFAULT_ABI == ABI_DARWIN
|| (DEFAULT_ABI == ABI_V4
&& (INTVAL (operands[2]) & CALL_LONG) == 0))"
--- 11053,11059 ----
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (clobber (reg:SI 65))]
"(DEFAULT_ABI == ABI_DARWIN
|| (DEFAULT_ABI == ABI_V4
&& (INTVAL (operands[2]) & CALL_LONG) == 0))"
***************
*** 11089,11095 ****
(call (mem:SI (match_operand:P 1 "register_operand" "c,*l,c,*l"))
(match_operand 2 "" "g,g,g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
! (clobber (match_scratch:SI 4 "=l,l,l,l"))]
"DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN"
{
--- 11089,11095 ----
(call (mem:SI (match_operand:P 1 "register_operand" "c,*l,c,*l"))
(match_operand 2 "" "g,g,g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
! (clobber (reg:SI 65))]
"DEFAULT_ABI == ABI_V4
|| DEFAULT_ABI == ABI_DARWIN"
{
***************
*** 11109,11115 ****
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (clobber (match_scratch:SI 4 "=l,l"))]
"(DEFAULT_ABI == ABI_DARWIN
|| (DEFAULT_ABI == ABI_V4
&& (INTVAL (operands[3]) & CALL_LONG) == 0))"
--- 11109,11115 ----
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (clobber (reg:SI 65))]
"(DEFAULT_ABI == ABI_DARWIN
|| (DEFAULT_ABI == ABI_V4
&& (INTVAL (operands[3]) & CALL_LONG) == 0))"
***************
*** 11170,11176 ****
[(parallel [(call (mem:SI (match_operand 0 "address_operand" ""))
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
! (use (match_operand 3 "" ""))
(return)])]
""
"
--- 11170,11176 ----
[(parallel [(call (mem:SI (match_operand 0 "address_operand" ""))
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
! (use (reg:SI 65))
(return)])]
""
"
***************
*** 11184,11191 ****
gcc_assert (GET_CODE (operands[1]) == CONST_INT);
operands[0] = XEXP (operands[0], 0);
- operands[3] = gen_reg_rtx (SImode);
-
}")
;; this and similar patterns must be marked as using LR, otherwise
--- 11184,11189 ----
***************
*** 11196,11202 ****
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (use (match_operand:SI 3 "register_operand" "l,l"))
(return)]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
"*
--- 11194,11200 ----
[(call (mem:SI (match_operand:SI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (use (reg:SI 65))
(return)]
"(INTVAL (operands[2]) & CALL_LONG) == 0"
"*
***************
*** 11216,11222 ****
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (use (match_operand:SI 3 "register_operand" "l,l"))
(return)]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
"*
--- 11214,11220 ----
[(call (mem:SI (match_operand:DI 0 "current_file_function_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
! (use (reg:SI 65))
(return)]
"TARGET_64BIT && (INTVAL (operands[2]) & CALL_LONG) == 0"
"*
***************
*** 11237,11243 ****
(call (mem:SI (match_operand:SI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (use (match_operand:SI 4 "register_operand" "l,l"))
(return)]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
"*
--- 11235,11241 ----
(call (mem:SI (match_operand:SI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (use (reg:SI 65))
(return)]
"(INTVAL (operands[3]) & CALL_LONG) == 0"
"*
***************
*** 11259,11265 ****
(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (use (match_operand:SI 4 "register_operand" "l,l"))
(return)]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
"*
--- 11257,11263 ----
(call (mem:SI (match_operand:DI 1 "current_file_function_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (use (reg:SI 65))
(return)]
"TARGET_64BIT && (INTVAL (operands[3]) & CALL_LONG) == 0"
"*
***************
*** 11279,11285 ****
[(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (use (match_operand:SI 3 "register_operand" "l"))
(return)]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
--- 11277,11283 ----
[(call (mem:SI (match_operand:SI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (use (reg:SI 65))
(return)]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
***************
*** 11292,11298 ****
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (use (match_operand:SI 3 "register_operand" "l"))
(return)]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
--- 11290,11296 ----
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s"))
(match_operand 1 "" "g"))
(use (match_operand:SI 2 "immediate_operand" "O"))
! (use (reg:SI 65))
(return)]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
***************
*** 11306,11312 ****
(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (use (match_operand:SI 4 "register_operand" "l"))
(return)]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
--- 11304,11310 ----
(call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (use (reg:SI 65))
(return)]
"TARGET_32BIT
&& DEFAULT_ABI == ABI_AIX
***************
*** 11320,11326 ****
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (use (match_operand:SI 4 "register_operand" "l"))
(return)]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
--- 11318,11324 ----
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s"))
(match_operand 2 "" "g")))
(use (match_operand:SI 3 "immediate_operand" "O"))
! (use (reg:SI 65))
(return)]
"TARGET_64BIT
&& DEFAULT_ABI == ABI_AIX
***************
*** 11333,11339 ****
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" ""))
(use (match_operand 2 "immediate_operand" "O,n"))
! (use (match_operand:SI 3 "register_operand" "l,l"))
(return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
--- 11331,11337 ----
[(call (mem:SI (match_operand:P 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" ""))
(use (match_operand 2 "immediate_operand" "O,n"))
! (use (reg:SI 65))
(return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
***************
*** 11364,11370 ****
(call (mem:SI (match_operand 1 "address_operand" ""))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
! (use (match_operand 4 "" ""))
(return)])]
""
"
--- 11362,11368 ----
(call (mem:SI (match_operand 1 "address_operand" ""))
(match_operand 2 "" "")))
(use (match_operand 3 "" ""))
! (use (reg:SI 65))
(return)])]
""
"
***************
*** 11378,11385 ****
gcc_assert (GET_CODE (operands[2]) == CONST_INT);
operands[1] = XEXP (operands[1], 0);
- operands[4] = gen_reg_rtx (SImode);
-
}")
(define_insn "*sibcall_value_nonlocal_sysv<mode>"
--- 11376,11381 ----
***************
*** 11387,11393 ****
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (use (match_operand:SI 4 "register_operand" "l,l"))
(return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
--- 11383,11389 ----
(call (mem:SI (match_operand:P 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
! (use (reg:SI 65))
(return)]
"(DEFAULT_ABI == ABI_DARWIN
|| DEFAULT_ABI == ABI_V4)
***************
*** 14381,14390 ****
(define_insn "*save_fpregs_<mode>"
[(match_parallel 0 "any_parallel_operand"
! [(clobber (match_operand:P 1 "register_operand" "=l"))
! (use (match_operand:P 2 "call_operand" "s"))
! (set (match_operand:DF 3 "memory_operand" "=m")
! (match_operand:DF 4 "gpc_reg_operand" "f"))])]
""
"bl %z2"
[(set_attr "type" "branch")
--- 14377,14386 ----
(define_insn "*save_fpregs_<mode>"
[(match_parallel 0 "any_parallel_operand"
! [(clobber (reg:P 65))
! (use (match_operand:P 1 "call_operand" "s"))
! (set (match_operand:DF 2 "memory_operand" "=m")
! (match_operand:DF 3 "gpc_reg_operand" "f"))])]
""
"bl %z2"
[(set_attr "type" "branch")
***************
*** 14475,14484 ****
(define_insn "*return_and_restore_fpregs_<mode>"
[(match_parallel 0 "any_parallel_operand"
[(return)
! (use (match_operand:P 1 "register_operand" "l"))
! (use (match_operand:P 2 "call_operand" "s"))
! (set (match_operand:DF 3 "gpc_reg_operand" "=f")
! (match_operand:DF 4 "memory_operand" "m"))])]
""
"b %z2")
--- 14471,14480 ----
(define_insn "*return_and_restore_fpregs_<mode>"
[(match_parallel 0 "any_parallel_operand"
[(return)
! (use (reg:P 65))
! (use (match_operand:P 1 "call_operand" "s"))
! (set (match_operand:DF 2 "gpc_reg_operand" "=f")
! (match_operand:DF 3 "memory_operand" "m"))])]
""
"b %z2")