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Fix Blackfin MI thunks
- From: Bernd Schmidt <bernds_cb1 at t-online dot de>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 27 Feb 2007 16:24:04 +0100
- Subject: Fix Blackfin MI thunks
We were using R2 as a scratch register, which is unfortunate since it's
the third argument register. Changed to R3, committed as 122376.
Interestingly this wasn't caught by the g++ testsuite and showed up in a
larger application.
Bernd
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Index: ChangeLog
===================================================================
--- ChangeLog (revision 122374)
+++ ChangeLog (working copy)
@@ -43,6 +43,9 @@
* config/bfin/bfin.md (ssashiftv2hi3, ssashifthi3, lshiftv2hi3,
lshifthi3): Fix output template to use half reg for operand 2.
+ * config/bfin/bfin.c (bfin_output_mi_thunk): Use R3 as scratch reg
+ instead of R2.
+
2007-02-27 Andreas Schwab <schwab@suse.de>
* Makefile.in (TEXI_GCCINSTALL_FILES): Add gcc-common.texi.
Index: config/bfin/bfin.c
===================================================================
--- config/bfin/bfin.c (revision 122372)
+++ config/bfin/bfin.c (working copy)
@@ -4556,7 +4556,7 @@ bfin_output_mi_thunk (FILE *file ATTRIBU
if (vcall_offset)
{
rtx p2tmp = gen_rtx_REG (Pmode, REG_P2);
- rtx tmp = gen_rtx_REG (Pmode, REG_R2);
+ rtx tmp = gen_rtx_REG (Pmode, REG_R3);
xops[1] = tmp;
xops[2] = p2tmp;