[committed] PR middle-end/30761 (was: [PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug)

["Ulrich Weigand" <uweigand at de dot ibm dot com>]

Andrew Pinksi wrote:
> Any news on this patch going into the mainline?
> I had to backport this patch to our internal 4.1 sources as we found
> the same bug there and this patch fixed the problem too.

this patch, originally discussed in the context of PR middle-end/28690,
has turned out to fix PR middle-end/30761 as well, so I've now committed
it to mainline.

Bootstrapped/regtested on s390-ibm-linux, s390x-ibm-linux,
powerpc64-ibm-linux.   Applied to mainline.

Bye,
Ulrich


ChangeLog:

	PR middle-end/30761
	* reload1.c (eliminate_regs_in_insn): In the single_set special
	case, attempt to re-recognize the insn before falling back to
	having reload fix it up.

Index: gcc/reload1.c
===================================================================
*** gcc/reload1.c	(revision 122132)
--- gcc/reload1.c	(working copy)
*************** eliminate_regs_in_insn (rtx insn, int re
*** 3105,3139 ****
  	    if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
  	      to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)),
  				    to_rtx);
- 	    if (offset == 0)
- 	      {
- 		int num_clobbers;
- 		/* We assume here that if we need a PARALLEL with
- 		   CLOBBERs for this assignment, we can do with the
- 		   MATCH_SCRATCHes that add_clobbers allocates.
- 		   There's not much we can do if that doesn't work.  */
- 		PATTERN (insn) = gen_rtx_SET (VOIDmode,
- 					      SET_DEST (old_set),
- 					      to_rtx);
- 		num_clobbers = 0;
- 		INSN_CODE (insn) = recog (PATTERN (insn), insn, &num_clobbers);
- 		if (num_clobbers)
- 		  {
- 		    rtvec vec = rtvec_alloc (num_clobbers + 1);
- 
- 		    vec->elem[0] = PATTERN (insn);
- 		    PATTERN (insn) = gen_rtx_PARALLEL (VOIDmode, vec);
- 		    add_clobbers (PATTERN (insn), INSN_CODE (insn));
- 		  }
- 		gcc_assert (INSN_CODE (insn) >= 0);
- 	      }
  	    /* If we have a nonzero offset, and the source is already
  	       a simple REG, the following transformation would
  	       increase the cost of the insn by replacing a simple REG
  	       with (plus (reg sp) CST).  So try only when we already
  	       had a PLUS before.  */
! 	    else if (plus_src)
  	      {
  		new_body = old_body;
  		if (! replace)
  		  {
--- 3105,3119 ----
  	    if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
  	      to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)),
  				    to_rtx);
  	    /* If we have a nonzero offset, and the source is already
  	       a simple REG, the following transformation would
  	       increase the cost of the insn by replacing a simple REG
  	       with (plus (reg sp) CST).  So try only when we already
  	       had a PLUS before.  */
! 	    if (offset == 0 || plus_src)
  	      {
+ 		rtx new_src = plus_constant (to_rtx, offset);
+ 
  		new_body = old_body;
  		if (! replace)
  		  {
*************** eliminate_regs_in_insn (rtx insn, int re
*** 3144,3151 ****
  		PATTERN (insn) = new_body;
  		old_set = single_set (insn);
  
! 		XEXP (SET_SRC (old_set), 0) = to_rtx;
! 		XEXP (SET_SRC (old_set), 1) = GEN_INT (offset);
  	      }
  	    else
  	      break;
--- 3124,3143 ----
  		PATTERN (insn) = new_body;
  		old_set = single_set (insn);
  
! 		/* First see if this insn remains valid when we make the
! 		   change.  If not, try to replace the whole pattern with
! 		   a simple set (this may help if the original insn was a
! 		   PARALLEL that was only recognized as single_set due to 
! 		   REG_UNUSED notes).  If this isn't valid either, keep
! 		   the INSN_CODE the same and let reload fix it up.  */
! 		if (!validate_change (insn, &SET_SRC (old_set), new_src, 0))
! 		  {
! 		    rtx new_pat = gen_rtx_SET (VOIDmode,
! 					       SET_DEST (old_set), new_src);
! 
! 		    if (!validate_change (insn, &PATTERN (insn), new_pat, 0))
! 		      SET_SRC (old_set) = new_src;
! 		  }
  	      }
  	    else
  	      break;

-- 
  Dr. Ulrich Weigand
  GNU Toolchain for Linux on System z and Cell BE
  Ulrich.Weigand@de.ibm.com