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Re: PATCH: x86/x86-64: Support Intel SSSE3/MNI intrinsics
- From: Mark Mitchell <mark at codesourcery dot com>
- To: "H. J. Lu" <hjl at lucon dot org>
- Cc: Andrew Pinski <pinskia at physics dot uc dot edu>, Ian Lance Taylor <iant at google dot com>, gcc-patches at gcc dot gnu dot org
- Date: Thu, 28 Sep 2006 13:25:20 -0700
- Subject: Re: PATCH: x86/x86-64: Support Intel SSSE3/MNI intrinsics
- References: <20060224204733.GA1714@lucon.org> <E9478302-EE79-4C47-973D-417CAFBA7A6B@apple.com> <20060626182743.GA9896@lucon.org> <m33bdif1tt.fsf@localhost.localdomain> <20060705183055.GA9428@lucon.org> <20060710223553.GA10395@lucon.org> <m3u05lnf16.fsf@localhost.localdomain> <44B6FFDF.80700@codesourcery.com> <20060928134749.GA19128@lucon.org> <1159451751.12088.10.camel@celery.andrew.com> <20060928164944.GA20298@lucon.org>
H. J. Lu wrote:
Here is the updated SSSE3 intrinsic patch.
I have no comments on the substance of the patch itself. If the IA32
maintainers want to put this in for GCC 4.2, that's OK with me; if they
want to hold off until 4.3, that's fine too.
I think -mssse3 is a reasonable name, given that Intel has chosen to
name the thing "Supplemental SSE3". That's what the name of the
instruction set is, so that's what we should use.
--
Mark Mitchell
CodeSourcery
mark@codesourcery.com
(650) 331-3385 x713