This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
[addrmodes] Convert rs6000
- From: Paolo Bonzini <paolo dot bonzini at lu dot unisi dot ch>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 22 Aug 2006 13:49:02 +0200
- Subject: [addrmodes] Convert rs6000
Here is the list of changes in the targets (so far I built cc1 for them).
12 s390 2 files changed, 6 insertions(+), 6 deletions(-)
24 stormy16 2 files changed, 6 insertions(+), 18 deletions(-)
30 fr30 1 files changed, 3 insertions(+), 27 deletions(-)
30 ia64 2 files changed, 8 insertions(+), 22 deletions(-)
33 mt 3 files changed, 6 insertions(+), 27 deletions(-)
35 bfin 2 files changed, 6 insertions(+), 29 deletions(-)
35 m32c 3 files changed, 5 insertions(+), 30 deletions(-)
40 avr 2 files changed, 10 insertions(+), 30 deletions(-)
41 mips 3 files changed, 7 insertions(+), 34 deletions(-)
42 mmix 2 files changed, 12 insertions(+), 30 deletions(-)
44 crx 2 files changed, 18 insertions(+), 26 deletions(-)
44 xtensa 2 files changed, 10 insertions(+), 34 deletions(-)
51 cris 1 files changed, 13 insertions(+), 38 deletions(-)
57 c4x 2 files changed, 8 insertions(+), 49 deletions(-)
57 v850 2 files changed, 9 insertions(+), 48 deletions(-)
58 h8300 2 files changed, 9 insertions(+), 49 deletions(-)
68 i386 3 files changed, 8 insertions(+), 60 deletions(-)
69 m68k 1 files changed, 23 insertions(+), 46 deletions(-)
70 iq2000 3 files changed, 11 insertions(+), 59 deletions(-)
74 alpha 2 files changed, 15 insertions(+), 59 deletions(-)
78 sh 2 files changed, 22 insertions(+), 56 deletions(-)
81 m32r 1 files changed, 19 insertions(+), 62 deletions(-)
83 vax 2 files changed, 19 insertions(+), 64 deletions(-)
87 frv 2 files changed, 14 insertions(+), 73 deletions(-)
96 sparc 2 files changed, 6 insertions(+), 90 deletions(-)
97 arc 1 files changed, 31 insertions(+), 66 deletions(-)
105 mcore 2 files changed, 36 insertions(+), 69 deletions(-)
117 m68hc11 2 files changed, 25 insertions(+), 92 deletions(-)
120 rs6000 2 files changed, 35 insertions(+), 85 deletions(-)
164 arm 3 files changed, 12 insertions(+), 152 deletions(-)
180 pdp11 3 files changed, 50 insertions(+), 130 deletions(-)
211 pa 3 files changed, 86 insertions(+), 125 deletions(-)
220 mn10300 3 files changed, 98 insertions(+), 122 deletions(-)
Overall -1300 lines. If maintainers want to have a peek or
bootstrap/regtest themselves, drop me a line.
I'm starting from rs6000 because I already bootstrapped it. Otherwise
I'll complete the testing mostly in size order.
Assembly comparison still in progress (ok for gcc source), bootstrapped
C only. Will commit to branch soon.
Paolo
2006-08-22 Paolo Bonzini <bonzini@gnu.org>
* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p,
legitimate_indexed_address_p, legitimate_indirect_address_p,
macho_lo_sum_memory_operand, legitimate_lo_sum_address_p):
Use ok_for_*_p.
(REG_MODE_OK_FOR_BASE_P): Delete.
(rs6000_legitimize_reload_address): Use ok_for_*_p and
base_reg_class.
* config/rs6000/rs6000.h (MODE_CODE_BASE_REG_CLASS): New name of...
(BASE_REG_CLASS): ... this.
(REGNO_OK_FOR_INDEX_P): Don't look up reg_renumber.
(REGNO_MODE_CODE_OK_FOR_BASE_P): Likewise, renamed from...
(REGNO_OK_FOR_BASE_P): ... this.
(INT_REG_OK_FOR_INDEX_P, INT_REG_OK_FOR_BASE_P,
REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
Index: rs6000.c
===================================================================
--- rs6000.c (revision 116286)
+++ rs6000.c (working copy)
@@ -56,6 +56,7 @@
#include "tree-gimple.h"
#include "intl.h"
#include "params.h"
+#include "addresses.h"
#include "tm-constrs.h"
#if TARGET_XCOFF
#include "xcoffout.h" /* get declarations of xcoff_*_section_name */
@@ -2757,9 +2758,7 @@ rs6000_legitimate_offset_address_p (enum
if (GET_CODE (x) != PLUS)
return false;
- if (GET_CODE (XEXP (x, 0)) != REG)
- return false;
- if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict))
+ if (!ok_for_base_p (XEXP (x, 0), mode, PLUS, SCRATCH, strict))
return false;
if (legitimate_constant_pool_address_p (x))
return true;
@@ -2842,17 +2841,16 @@ legitimate_indexed_address_p (rtx x, int
&& REG_P (op1))
return true;
- return (REG_P (op0) && REG_P (op1)
- && ((INT_REG_OK_FOR_BASE_P (op0, strict)
- && INT_REG_OK_FOR_INDEX_P (op1, strict))
- || (INT_REG_OK_FOR_BASE_P (op1, strict)
- && INT_REG_OK_FOR_INDEX_P (op0, strict))));
+ return (ok_for_base_p (op0, VOIDmode, PLUS, REG, strict)
+ && ok_for_index_p (op1, strict))
+ || (ok_for_base_p (op1, VOIDmode, PLUS, REG, strict)
+ && ok_for_index_p (op0, strict));
}
inline bool
legitimate_indirect_address_p (rtx x, int strict)
{
- return GET_CODE (x) == REG && INT_REG_OK_FOR_BASE_P (x, strict);
+ return ok_for_base_p (x, VOIDmode, MEM, SCRATCH, strict);
}
bool
@@ -2861,17 +2859,11 @@ macho_lo_sum_memory_operand (rtx x, enum
if (!TARGET_MACHO || !flag_pic
|| mode != SImode || GET_CODE (x) != MEM)
return false;
- x = XEXP (x, 0);
-
- if (GET_CODE (x) != LO_SUM)
- return false;
- if (GET_CODE (XEXP (x, 0)) != REG)
- return false;
- if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), 0))
- return false;
- x = XEXP (x, 1);
- return CONSTANT_P (x);
+ x = XEXP (x, 0);
+ return GET_CODE (x) != LO_SUM
+ && CONSTANT_P (XEXP (x, 1))
+ && ok_for_base_p_nonstrict (XEXP (x, 0), mode, LO_SUM, SCRATCH);
}
static bool
@@ -2879,9 +2871,7 @@ legitimate_lo_sum_address_p (enum machin
{
if (GET_CODE (x) != LO_SUM)
return false;
- if (GET_CODE (XEXP (x, 0)) != REG)
- return false;
- if (!INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict))
+ if (!ok_for_base_p (XEXP (x, 0), mode, LO_SUM, SCRATCH, strict))
return false;
/* Restrict addressing for DI because of our SUBREG hackery. */
if (TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode))
@@ -3301,13 +3291,6 @@ rs6000_tls_symbol_ref_1 (rtx *x, void *d
return RS6000_SYMBOL_REF_TLS_P (*x);
}
-/* The convention appears to be to define this wherever it is used.
- With legitimize_reload_address now defined here, REG_MODE_OK_FOR_BASE_P
- is now used here. */
-#ifndef REG_MODE_OK_FOR_BASE_P
-#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
-#endif
-
/* Our implementation of LEGITIMIZE_RELOAD_ADDRESS. Returns a value to
replace the input X, or the original X if no replacement is called for.
The output parameter *WIN is 1 if the calling macro should goto WIN,
@@ -3334,7 +3317,8 @@ rs6000_legitimize_reload_address (rtx x,
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
{
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
- BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
+ base_reg_class (mode, PLUS, CONST_INT),
+ GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type)type);
*win = 1;
return x;
@@ -3355,7 +3339,8 @@ rs6000_legitimize_reload_address (rtx x,
/* Result of previous invocation of this function on Darwin
floating point constant. */
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
- BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
+ base_reg_class (mode, LO_SUM, SYMBOL_REF),
+ Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type)type);
*win = 1;
return x;
@@ -3365,10 +3350,9 @@ rs6000_legitimize_reload_address (rtx x,
/* Force ld/std non-word aligned offset into base register by wrapping
in offset 0. */
if (GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x, 0)) == REG
- && REGNO (XEXP (x, 0)) < 32
- && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode)
&& GET_CODE (XEXP (x, 1)) == CONST_INT
+ && ok_for_base_p_strict (XEXP (x, 0), mode, PLUS, CONST_INT)
+ && REGNO (XEXP (x, 0)) < 32
&& (INTVAL (XEXP (x, 1)) & 3) != 0
&& !ALTIVEC_VECTOR_MODE (mode)
&& GET_MODE_SIZE (mode) >= UNITS_PER_WORD
@@ -3376,17 +3360,16 @@ rs6000_legitimize_reload_address (rtx x,
{
x = gen_rtx_PLUS (GET_MODE (x), x, GEN_INT (0));
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
- BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
+ base_reg_class (mode, PLUS, CONST_INT),
+ GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type) type);
*win = 1;
return x;
}
if (GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x, 0)) == REG
- && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
- && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode)
&& GET_CODE (XEXP (x, 1)) == CONST_INT
+ && ok_for_base_p_strict (XEXP (x, 0), mode, PLUS, CONST_INT)
&& !SPE_VECTOR_MODE (mode)
&& !(TARGET_E500_DOUBLE && (mode == DFmode
|| mode == DImode))
@@ -3413,7 +3396,8 @@ rs6000_legitimize_reload_address (rtx x,
GEN_INT (low));
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
- BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
+ base_reg_class (mode, PLUS, CONST_INT),
+ GET_MODE (x), VOIDmode, 0, 0,
opnum, (enum reload_type)type);
*win = 1;
return x;
@@ -3453,7 +3437,8 @@ rs6000_legitimize_reload_address (rtx x,
gen_rtx_HIGH (Pmode, x), x);
push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
- BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
+ base_reg_class (mode, LO_SUM, SYMBOL_REF),
+ Pmode, VOIDmode, 0, 0,
opnum, (enum reload_type)type);
*win = 1;
return x;
Index: rs6000.h
===================================================================
--- rs6000.h (revision 116289)
+++ rs6000.h (working copy)
@@ -1057,7 +1057,7 @@ enum reg_class
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS GENERAL_REGS
-#define BASE_REG_CLASS BASE_REGS
+#define MODE_CODE_BASE_REG_CLASS(MODE, OUTER, INDEX) BASE_REGS
/* Given an rtx X being reloaded into a reg required to be
in class CLASS, return the class of reg to actually use.
@@ -1551,25 +1551,17 @@ typedef struct rs6000_args
/* These assume that REGNO is a hard or pseudo reg number.
They give nonzero only if REGNO is a hard reg of the suitable class
- or a pseudo reg currently allocated to a suitable hard reg.
- Since they use reg_renumber, they are safe only once reg_renumber
- has been allocated, which happens in local-alloc.c. */
+ or a pseudo reg currently allocated to a suitable hard reg. */
#define REGNO_OK_FOR_INDEX_P(REGNO) \
-((REGNO) < FIRST_PSEUDO_REGISTER \
- ? (REGNO) <= 31 || (REGNO) == 67 \
- || (REGNO) == FRAME_POINTER_REGNUM \
- : (reg_renumber[REGNO] >= 0 \
- && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67 \
- || reg_renumber[REGNO] == FRAME_POINTER_REGNUM)))
-
-#define REGNO_OK_FOR_BASE_P(REGNO) \
-((REGNO) < FIRST_PSEUDO_REGISTER \
- ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
- || (REGNO) == FRAME_POINTER_REGNUM \
- : (reg_renumber[REGNO] > 0 \
- && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67 \
- || reg_renumber[REGNO] == FRAME_POINTER_REGNUM)))
+ ((REGNO) <= 31 \
+ || (REGNO) == ARG_POINTER_REGNUM \
+ || (REGNO) == FRAME_POINTER_REGNUM)
+
+#define REGNO_MODE_CODE_OK_FOR_BASE_P(REGNO, MODE, OUTER, INDEX) \
+ (((REGNO) > 0 && (REGNO) <= 31) \
+ || (REGNO) == ARG_POINTER_REGNUM \
+ || (REGNO) == FRAME_POINTER_REGNUM)
/* Maximum number of registers that can appear in a valid memory address. */
@@ -1603,33 +1595,6 @@ typedef struct rs6000_args
&& EASY_VECTOR_15((n) >> 1) \
&& ((n) & 1) == 0)
-/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
- and check its validity for a certain class.
- We have two alternate definitions for each of them.
- The usual definition accepts all pseudo regs; the other rejects
- them unless they have been allocated suitable hard regs.
- The symbol REG_OK_STRICT causes the latter definition to be used.
-
- Most source files want to accept pseudo regs in the hope that
- they will get allocated to the class that the insn wants them to be in.
- Source files for reload pass need to be strict.
- After reload, it makes no difference, since pseudo regs have
- been eliminated by then. */
-
-/* Nonzero if X is a hard reg that can be used as an index
- or if it is a pseudo reg in the non-strict case. */
-#define INT_REG_OK_FOR_INDEX_P(X, STRICT) \
- ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \
- || REGNO_OK_FOR_INDEX_P (REGNO (X)))
-
-/* Nonzero if X is a hard reg that can be used as a base reg
- or if it is a pseudo reg in the non-strict case. */
-#define INT_REG_OK_FOR_BASE_P(X, STRICT) \
- ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \
- || REGNO_OK_FOR_BASE_P (REGNO (X)))
-
-#define REG_OK_FOR_INDEX_P(X) INT_REG_OK_FOR_INDEX_P (X, REG_STRICT_P)
-#define REG_OK_FOR_BASE_P(X) INT_REG_OK_FOR_BASE_P (X, REG_STRICT_P)
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
that is a valid memory address for an instruction.