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[PATCH, committed] PR 28150 and PR 28170
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 06 Jul 2006 15:02:50 -0400
- Subject: [PATCH, committed] PR 28150 and PR 28170
These patches fix PR 28150 (TFmode PRE_INC) and PR 28170 (insv
with shift). The insv function cleanups were incorporated from Alan
Modra's patch.
Bootstrapped and regression tested on powerpc-ibm-aix5.2.0.0 and
powerpc-linux.
David
PR target/28150
* config/rs6000/rs6000.c (rs6000_legitimate_address): Do not allow
PRE_{INC,DEC} of TFmode.
PR target/28170
* config/rs6000/rs6000.c (insvdi_rshift_rlwimi_p): Correct shiftop
bounds. Simplify.
Index: rs6000.c
===================================================================
*** rs6000.c (revision 115219)
--- rs6000.c (working copy)
*************** rs6000_legitimate_address (enum machine_
*** 3522,3527 ****
--- 3522,3528 ----
if ((GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC)
&& !ALTIVEC_VECTOR_MODE (mode)
&& !SPE_VECTOR_MODE (mode)
+ && mode != TFmode
/* Restrict addressing for DI because of our SUBREG hackery. */
&& !(TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode))
&& TARGET_UPDATE
*************** effects of instruction do not correspond
*** 9799,9810 ****
int
insvdi_rshift_rlwimi_p (rtx sizeop, rtx startop, rtx shiftop)
{
! if (INTVAL (startop) < 64
! && INTVAL (startop) > 32
! && (INTVAL (sizeop) + INTVAL (startop) < 64)
! && (INTVAL (sizeop) + INTVAL (startop) > 33)
! && (INTVAL (sizeop) + INTVAL (startop) + INTVAL (shiftop) < 96)
! && (INTVAL (sizeop) + INTVAL (startop) + INTVAL (shiftop) >= 64)
&& (64 - (INTVAL (shiftop) & 63)) >= INTVAL (sizeop))
return 1;
--- 9800,9811 ----
int
insvdi_rshift_rlwimi_p (rtx sizeop, rtx startop, rtx shiftop)
{
! if (INTVAL (startop) > 32
! && INTVAL (startop) < 64
! && INTVAL (sizeop) > 1
! && INTVAL (sizeop) + INTVAL (startop) < 64
! && INTVAL (shiftop) > 0
! && INTVAL (sizeop) + INTVAL (shiftop) < 32
&& (64 - (INTVAL (shiftop) & 63)) >= INTVAL (sizeop))
return 1;