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Re: [PATCH for H8/300]:Fix ICE for H8SX

Hi Naveen,

The instructions "XOR" and "BNOT" are not getting generated for H8SX
when optimization options are enabled. Instead it gives ICE.

Any analysis?

const unsigned char baCryptX[]="A";

void TEST(unsigned char *ptrbVal)

int main()
  return 0;

Please turn this into a testcase suitable for the testsuite. You shouldn't need main. Since this is an ICE on valid code, gcc.c-torture/compile would be appropriate. The file name for the testcase can be something like 20060624-1.c.

        * gcc/config/h8300/ A new insn xorqi3_2 is added.
	  xorqi3_1 - Remove the condition for H8SX target.

Note that the path is relative from the location of the closest ChangeLog in the directory hierarchy, and that there is a separate ChangeLog for the testsuite, namely gcc/testsuite/ChangeLog.

+(define_insn "*xorqi3_2"
+  [(set (match_operand:QI 0 "bit_operand" "=rQ,r")
+        (xor:QI (match_operand:QI 1 "bit_operand" "%0,WU")
+                (match_operand:QI 2 "h8300_src_operand" "rQi,IP1>X")))]
+  "TARGET_H8300SX"
+  "@
+   xor\\t %X2,%X0
+   bnot\\t %V2,%R0"
+  [(set_attr "length" "*,8")
+   (set_attr "length_table" "logicb,*")
+   (set_attr "cc" "set_znv,none_0hit")])

I'd suggest a pattern name like *xorqi3_h8300sx to indicate that the pattern is only for H8SX.

 (define_insn "xorqi3_1"
   [(set (match_operand:QI 0 "bit_operand" "=r,U")
 	(xor:QI (match_operand:QI 1 "bit_operand" "%0,0")
 		(match_operand:QI 2 "h8300_src_operand" "rQi,n")))]
-  "TARGET_H8300SX || register_operand (operands[0], QImode)
+  "register_operand (operands[0], QImode)
    || single_one_operand (operands[2], QImode)"
-  [(set_attr "length" "*,8")
-   (set_attr "length_table" "logicb,*")
+  [(set_attr "length" "2,8")
    (set_attr "cc" "set_znv,none_0hit")])

I'd like you to put !TARGET_H8SX in the condition for documentation purposes. (GCC's pattern matching looks for the first match in the machine description file.)

Kazu Hirata

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