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Re: [PATCH] Don't use FLDMX and FSTMX on ARMv6+
- From: Mark Shinwell <shinwell at codesourcery dot com>
- To: Mark Shinwell <shinwell at codesourcery dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Wed, 21 Jun 2006 21:04:45 +0100
- Subject: Re: [PATCH] Don't use FLDMX and FSTMX on ARMv6+
- References: <email@example.com>
Mark Shinwell wrote:
The FLDMX and FSTMX load/store-multiple insns are deprecated in favour of
FLDMD and FSTMD respectively on ARMv6 and above. This patch causes
gcc to use the latter instructions instead of FLDMX and FSTMX when
emitting code for such architectures.
FLDMD and FSTMD correspond to a different set of unwind opcodes from
FLDMX and FSTMX. I have already had approved and committed a binutils
patch  that provides a new ".vsave" directive instructing the
assembler to emit unwind opcodes to correspond to an FSTMD instruction.
As a consequence, an ARM compiler with the attached patch requires also
that binutils patch in the toolchain for successful emission of code
that involves the generation of unwind information for VFP registers.
The unwind opcodes for the `D' instructions also provide for VFPv3
registers, which this patch also supports.
Given this, I wonder if a configure check should be added to test for
the presence of the updated assembler -- and if that fails, then gcc
should emit FLDMX and FSTMX as before.
This patch also fixes a number of off-by-one errors in pr-support.c,
as noted below. I've combined this with the other additions since I
have made other modifications around the same places.
Regression tested with an arm-none-linux-gnueabi target, with the
exception of course of the VFPv3 support in this patch. The patch has
also been manually tested to check that stack unwinding is working
OK for mainline, once open?
Sorry, I seem to have posted a slightly out-of-date version of this.
I'll post another one tomorrow.