Re: {PING] [PATCH] Sign extension elimination

["H. J. Lu" <hjl at lucon dot org>]

On Tue, Apr 18, 2006 at 07:54:33AM -0700, H. J. Lu wrote:
> On Tue, Apr 18, 2006 at 10:19:11AM +0300, Leehod Baruch wrote:
> > >> > I don't think the current SEE worked well for x86-64. We have been
> > >> > trying to extend it to x86-64. My main concern is when SEE is enabled,
> > >> > some very odd x86-64 code is generated for some simple testcases.
> > >> Can you point out, what are the testcases and what is the odd code that
> > >> was generated.
> > ...
> > > logadd:
> > >         addl    %edi, %esi
> > >         movswl  %si,%eax
> > >         ret
> > >
> > > With SEE, I got
> > >
> > > logadd:
> > >         leal    (%rsi,%rdi), %eax
> > >         cwtl
> > >         ret
> > >
> > > I am not sure if the new one is better.
> > Even if the code is not optimal, if it is correct I don't think
> > that it is odd.
> > 
> > > The main problem for x86-64 is
> > > SEE is just moving instructions around or replacing one with another.
> > > For the testcase in
> > >
> > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17387
> > >
> > > "-O2 -fsee" doesn't reduce number of total instructions at all. It
> > > replaces
> > Did you use the version that we are working on (with Denis' change)?
> > If not, then we know what the problem is and we are on the way to fix it.
> > If yes, please send me the dump file of the SEE and the one just before it
> > and I'll try to see what is the problem.
> 
> Hi Leehod,
> 
> I sent you RTL dumps. I'd like to see SEE in first. Then we can make it
> to work for x86-64.

For x86-64, the first instruction in

(insn:HI 23 22 25 3 (parallel [
            (set (reg/v:SI 64 [ t.42 ])
                (xor:SI (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                            (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
                    (reg/v:SI 64 [ t.42 ])))
            (clobber (reg:CC 17 flags))
        ]) 340 {*xorsi_1} (insn_list:REG_DEP_TRUE 22 (nil))
    (expr_list:REG_UNUSED (reg:CC 17 flags)
        (expr_list:REG_EQUAL (xor:SI (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                        (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
                (mem/s:SI (plus:DI (mult:DI (reg:DI 69 [ t.45 ])
                            (const_int 4 [0x4]))
                        (symbol_ref:DI ("S") [flags 0x40] <var_decl 0x2a9853cb00 S>)) [3 S S4 A32]))
            (nil))))

(insn:HI 25 23 27 3 (set (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
        (reg/v:SI 64 [ t.42 ])) 40 {*movsi_1} (insn_list:REG_DEP_TRUE 23 (nil))
    (nil))

(insn:HI 27 25 30 3 (set (reg:DI 73 [ t.42 ])
        (zero_extend:DI (reg/v:SI 64 [ t.42 ]))) 111 {zero_extendsidi2_rex64} (nil)
    (expr_list:REG_DEAD (reg/v:SI 64 [ t.42 ])
        (nil)))

will zero extend t.42 to DI implicitly. But SEE doesn't know that and
it transforms them to

(insn:HI 23 22 86 3 (parallel [
            (set (reg:DI 73 [ t.42 ])
                (zero_extend:DI (xor:SI (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                                (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
                        (reg/v:SI 64 [ t.42 ]))))
            (clobber (reg:CC 17 flags))
        ]) 341 {*xorsi_1_zext} (insn_list:REG_DEP_TRUE 22 (nil))
    (expr_list:REG_DEAD (reg/v:SI 64 [ t.42 ])
        (expr_list:REG_UNUSED (reg:CC 17 flags)
            (expr_list:REG_EQUAL (xor:SI (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                            (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
                    (mem/s:SI (plus:DI (mult:DI (reg:DI 69 [ t.45 ])
                                (const_int 4 [0x4]))
                            (symbol_ref:DI ("S") [flags 0x40] <var_decl 0x2a9853cb00 S>)) [3 S S4 A32]))
                (nil)))))

(insn 86 23 25 3 (set (reg/v:SI 64 [ t.42 ])
        (subreg:SI (reg:DI 73 [ t.42 ]) 0)) -1 (nil)
    (nil))

(insn:HI 25 86 30 3 (set (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
        (reg/v:SI 64 [ t.42 ])) 40 {*movsi_1} (insn_list:REG_DEP_TRUE 23 (nil))
    (expr_list:REG_DEAD (reg/v:SI 64 [ t.42 ])
        (nil)))

If we don't want to add codes to the x86-64 backend to deal with SEE
transformation, is there a way for a backend to pass such information
to SEE so that SEE can transform them to

(insn:HI 23 22 25 3 (parallel [
            (set (reg/v:SI 64 [ t.42 ])
                (xor:SI (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                            (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
                    (reg/v:SI 64 [ t.42 ])))
            (clobber (reg:CC 17 flags))
        ]) 340 {*xorsi_1} (insn_list:REG_DEP_TRUE 22 (nil))
    (expr_list:REG_UNUSED (reg:CC 17 flags)
        (expr_list:REG_EQUAL (xor:SI (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                        (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
                (mem/s:SI (plus:DI (mult:DI (reg:DI 69 [ t.45 ])
                            (const_int 4 [0x4]))
                        (symbol_ref:DI ("S") [flags 0x40] <var_decl 0x2a9853cb00 S>)) [3 S S4 A32]))
            (nil))))

(insn:HI 25 23 27 3 (set (mem/s:SI (plus:DI (reg:DI 66 [ ivtmp.37 ])
                (symbol_ref:DI ("state") [flags 0x40] <var_decl 0x2a9853cc60 state>)) [3 state S4 A8])
        (reg/v:SI 64 [ t.42 ])) 40 {*movsi_1} (insn_list:REG_DEP_TRUE 23 (nil))
    (nil))


H.J.