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Re: [PATCH] ifcvt: Handle INSV patterns properly when a temp reg is needed
- From: Roger Sayle <roger at eyesopen dot com>
- To: Andreas Krebbel <krebbel1 at de dot ibm dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Fri, 31 Mar 2006 07:22:14 -0700 (MST)
- Subject: Re: [PATCH] ifcvt: Handle INSV patterns properly when a temp reg is needed
Hi Andreas,
On Fri, 31 Mar 2006, Andreas Krebbel wrote:
> 2006-03-31 Andreas Krebbel <krebbel1@de.ibm.com>
>
> * ifcvt.c (noce_emit_move_insn): Call store_bit_field if the resulting
> move would be an INSV insn.
This problem is also responsible for PR rtl-optimization/14261, and
the solution you propose is almost identical to a fix that I suggested
here http://gcc.gnu.org/ml/gcc-patches/2006-02/msg02039.html
Unfortunately, my patch was incorrect due to the dependency on
BITS_BIG_ENDIAN in store_bit_field as identified by James Wilson's
review http://gcc.gnu.org/ml/gcc-patches/2006-02/msg02073.html
Jim also suggested a test system to identify this problem using a
cross compiler to ia64-hpux.
At that point I gave up :-(. If you're interested in tackling
the BIS_BIG_ENDIAN issue, I'm happy to help by bootstrapping and
regression testing candidate patches on ia64-unknown-linux-gnu
and ia64-hp-hpux11.2x if you don't have access to them.
I'd also prefer to hold off on approving your "paradoxical SUBREGs
in store_bit_field" patch, until we've confirmed that that change
is needed. For 4.1, we may decide that its safer just to prevent
any ZERO_EXTRACTs from reaching this part of ifcvt.
Thoughts?
Roger
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