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[arm] Disallow memory-memory moves
- From: Paul Brook <paul at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Fri, 20 Jan 2006 23:22:08 +0000
- Subject: [arm] Disallow memory-memory moves
The attached patch is taken from csl-arm-branch.
It disallows DImode memory-memory moves. Currently this is enforced by the
insn constraints, but not the predicate.
Originally this was causing failures in gcc.c-torture/compile/20050113-1.c,
however this failure seems to have been perturbed out of existence.
The original patch can be found here:
http://gcc.gnu.org/ml/gcc-patches/2005-09/msg01342.html
Tested on arm-none-eabi.
Applied to mainline.
Paul
2006-01-20 Paul Brook <paul@codesourcery.com>
Merge from csl-arm-branch.
2005-09-21 Kazu Hirata <kazu@codesourcery.com>
* config/arm/arm.md (movdi): Force operands[1] to a register
if we have a non-register source.
(*arm_movdi, *movdf_soft_insn): Require that one of the
operands be a register.
* config/arm/iwmmxt.md (*iwmmxt_arm_movdi): Likewise.
* config/arm/vfp.md (*arm_movdi_vfp, *movdf_vfp): Likewise.
Index: gcc/config/arm/vfp.md
===================================================================
--- gcc/config/arm/vfp.md (revision 109981)
+++ gcc/config/arm/vfp.md (working copy)
@@ -148,7 +148,9 @@ (define_insn "*arm_movsi_vfp"
(define_insn "*arm_movdi_vfp"
[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r,m,w,r,w,w, Uv")
(match_operand:DI 1 "di_operand" "rIK,mi,r,r,w,w,Uvi,w"))]
- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
"*
switch (which_alternative)
{
@@ -207,7 +209,9 @@ (define_insn "*movsf_vfp"
(define_insn "*movdf_vfp"
[(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,r,r, m,w ,Uv,w,r")
(match_operand:DF 1 "soft_df_operand" " r,w,mF,r,UvF,w, w,r"))]
- "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+ "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP
+ && ( register_operand (operands[0], DFmode)
+ || register_operand (operands[1], DFmode))"
"*
{
switch (which_alternative)
Index: gcc/config/arm/iwmmxt.md
===================================================================
--- gcc/config/arm/iwmmxt.md (revision 109981)
+++ gcc/config/arm/iwmmxt.md (working copy)
@@ -66,7 +66,9 @@ (define_insn "iwmmxt_nanddi3"
(define_insn "*iwmmxt_arm_movdi"
[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, m,y,y,yr,y,yrUy")
(match_operand:DI 1 "di_operand" "rIK,mi,r,y,yr,y,yrUy,y"))]
- "TARGET_REALLY_IWMMXT"
+ "TARGET_REALLY_IWMMXT
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
"*
{
switch (which_alternative)
Index: gcc/config/arm/arm.md
===================================================================
--- gcc/config/arm/arm.md (revision 109981)
+++ gcc/config/arm/arm.md (working copy)
@@ -4092,13 +4092,10 @@ (define_expand "movdi"
(match_operand:DI 1 "general_operand" ""))]
"TARGET_EITHER"
"
- if (TARGET_THUMB)
+ if (!no_new_pseudos)
{
- if (!no_new_pseudos)
- {
- if (GET_CODE (operands[0]) != REG)
- operands[1] = force_reg (DImode, operands[1]);
- }
+ if (GET_CODE (operands[0]) != REG)
+ operands[1] = force_reg (DImode, operands[1]);
}
"
)
@@ -4107,8 +4104,10 @@ (define_insn "*arm_movdi"
[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
(match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))]
"TARGET_ARM
- && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP))
- && !TARGET_IWMMXT"
+ && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP))
+ && !TARGET_IWMMXT
+ && ( register_operand (operands[0], DImode)
+ || register_operand (operands[1], DImode))"
"*
switch (which_alternative)
{
@@ -5272,7 +5271,8 @@ (define_insn "*movdf_soft_insn"
[(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m")
(match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))]
"TARGET_ARM && TARGET_SOFT_FLOAT
- "
+ && ( register_operand (operands[0], DFmode)
+ || register_operand (operands[1], DFmode))"
"*
switch (which_alternative)
{