This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: -mtune=generic for i386 backend


On Wed, Jan 18, 2006 at 09:11:31PM +0100, Jan Hubicka wrote:
> > On Wed, Jan 18, 2006 at 08:29:42PM +0100, Jan Hubicka wrote:
> > > > On Wed, Jan 18, 2006 at 08:35:12AM +0100, Jan Hubicka wrote:
> > > > > Perhaps I can add two "generic" entries in the first to keep numeric
> > > > > values in sync?
> > > > 
> > > > Or just a comment, and we'll remember why the missing 32/64,
> > > > and skip a number later.
> > > 
> > > If we would skip a number, we would get the string array out of sync.  
> > > The TARGET_CPU_* and TARGET_CPU_DEFAULT_NAMES are really independent of
> > > PROCESSOR_* enumeration that needs to be in sync with "cpu" attribute.
> > > 
> > > I am testing the attached patch with new comments and the dupliced entry
> > > with comment, but those enumerations are really out of sync already:
> > > 
> > > enum processor_type
> > > {
> > >   PROCESSOR_I386,			/* 80386 */
> > >   PROCESSOR_I486,			/* 80486DX, 80486SX, 80486DX[24] */
> > >   PROCESSOR_PENTIUM,
> > >   PROCESSOR_PENTIUMPRO,
> > >   PROCESSOR_K6,
> > >   PROCESSOR_ATHLON,
> > >   PROCESSOR_PENTIUM4,
> > >   PROCESSOR_K8,
> > >   PROCESSOR_NOCONA,
> > >   PROCESSOR_GENERIC32,
> > >   PROCESSOR_GENERIC64,
> > >   PROCESSOR_max
> > > };
> > > 
> > > wrt
> > > 
> > > #define TARGET_CPU_DEFAULT_i386 0
> > > #define TARGET_CPU_DEFAULT_i486 1
> > > #define TARGET_CPU_DEFAULT_pentium 2
> > > #define TARGET_CPU_DEFAULT_pentium_mmx 3
> > > #define TARGET_CPU_DEFAULT_pentiumpro 4
> > > #define TARGET_CPU_DEFAULT_pentium2 5
> > > #define TARGET_CPU_DEFAULT_pentium3 6
> > > #define TARGET_CPU_DEFAULT_pentium4 7
> > > #define TARGET_CPU_DEFAULT_k6 8
> > > #define TARGET_CPU_DEFAULT_k6_2 9
> > > #define TARGET_CPU_DEFAULT_k6_3 10
> > > #define TARGET_CPU_DEFAULT_athlon 11
> > > #define TARGET_CPU_DEFAULT_athlon_sse 12
> > > #define TARGET_CPU_DEFAULT_k8 13
> > > #define TARGET_CPU_DEFAULT_pentium_m 14
> > > #define TARGET_CPU_DEFAULT_prescott 15
> > > #define TARGET_CPU_DEFAULT_nocona 16
> > > #define TARGET_CPU_DEFAULT_generic 17
> > > 
> > > One is enumerating internal names (that include two generics) other
> > > external names for config machinery, so perhaps we don't really need to
> > > worry here.  I also added the comments as requested and fixed typos.
> > > 
> > 
> > We have
> > 
> > #ifndef TARGET_CPU_DEFAULT
> > #ifdef TARGET_64BIT_DEFAULT
> > #define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8
> > #else
> > #define TARGET_CPU_DEFAULT 0
> > #endif
> > #endif
> > 
> > I'd like to chane it to
> > 
> > #define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic
> 
> This seems fine with me, but is there some case we can get through
> config.gcc without defining any TARGET_CPU_DEFAULT?
> Perhaps this can be all dropped.
> 

I don't see TARGET_CPU_DEFAULT set by config.gcc. I think it is usd for
different platforms to have different default:

i386.h:#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8
i386.h:#define TARGET_CPU_DEFAULT 0
i386-interix.h:#define TARGET_CPU_DEFAULT 2 /* 486 */
netware.h:#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_pentium4

Here is the patch against the last -mtune=generic patch.
TARGET_CPU_DEFAULT_NAMES is for defaulting ix86_tune_string only:

i386.c:  static const char * const cpu_names[] = TARGET_CPU_DEFAULT_NAMES;
i386.c:   ix86_tune_string = cpu_names [TARGET_CPU_DEFAULT];

We just need to handle ix86_tune_string defaulted to "generic"
properly.


H.J.
----
2006-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config.gcc (i386-*-*): Set with_cpu=i386.

	* config/i386/i386.h (TARGET_CPU_DEFAULT): Default to
	TARGET_CPU_DEFAULT_generic.

--- gcc/config.gcc.hjl	2006-01-18 12:13:01.000000000 -0800
+++ gcc/config.gcc	2006-01-18 12:40:11.000000000 -0800
@@ -2366,6 +2366,9 @@ if test x$with_cpu = x ; then
       # A Cirrus ARM variant.
       with_cpu="ep9312"
       ;;
+    i386-*-*)
+      with_cpu=i386
+      ;;
     i486-*-*)
       with_cpu=i486
       ;;
--- gcc/config/i386/i386.c.hjl	2006-01-18 12:13:01.000000000 -0800
+++ gcc/config/i386/i386.c	2006-01-18 12:59:34.000000000 -0800
@@ -1561,7 +1561,8 @@ override_options (void)
 
       /* ix86_tune_string is set to ix86_arch_string or defaulted.  We
 	 need to use a sensible tune option.  */
-      if (!strcmp (ix86_tune_string, "x86-64")
+      if (!strcmp (ix86_tune_string, "generic")
+	  || !strcmp (ix86_tune_string, "x86-64")
 	  || !strcmp (ix86_tune_string, "i686"))
 	{
 	  if (TARGET_64BIT)
--- gcc/config/i386/i386.h.hjl	2006-01-18 12:13:01.000000000 -0800
+++ gcc/config/i386/i386.h	2006-01-18 12:58:53.000000000 -0800
@@ -93,11 +93,7 @@ extern const struct processor_costs *ix8
 /* configure can arrange to make this 2, to force a 486.  */
 
 #ifndef TARGET_CPU_DEFAULT
-#ifdef TARGET_64BIT_DEFAULT
-#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_k8
-#else
-#define TARGET_CPU_DEFAULT 0
-#endif
+#define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic
 #endif
 
 #ifndef TARGET_FPMATH_DEFAULT
@@ -470,17 +466,16 @@ extern int x86_prefetch_sse;
 #define TARGET_CPU_DEFAULT_prescott 15
 #define TARGET_CPU_DEFAULT_nocona 16
 /* Internally "generic" CPU is actually handled as two CPUs "generic32" and
-   "generic64".  In order to stay in sync with "cpu" attribute, allocate
-   two slots for generic.  */
+   "generic64".  TARGET_CPU_DEFAULT_XXX is only used to provide the
+   default tune option.  */
 #define TARGET_CPU_DEFAULT_generic 17
-      /*TARGET_CPU_DEFAULT_generic 18*/
 
 #define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\
 				  "pentiumpro", "pentium2", "pentium3", \
 				  "pentium4", "k6", "k6-2", "k6-3",\
 				  "athlon", "athlon-4", "k8", \
-				  "pentium-m", "prescott", "nocona",
-				  "generic" /*32*/, "generic" /*64*/}
+				  "pentium-m", "prescott", "nocona", \
+				  "generic"}
 
 #ifndef CC1_SPEC
 #define CC1_SPEC "%(cc1_cpu) "


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]