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Re: [patch] Merge cfo-branch, RTL sequence abstraction (part 1)
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: Gabor Loki <loki at gcc dot gnu dot org>, gcc-patches <gcc-patches at gcc dot gnu dot org>, bernds_cb1 at t-online dot de, Ian Lance Taylor <ian at airs dot com>
- Date: Mon, 09 Jan 2006 10:56:03 +0000
- Subject: Re: [patch] Merge cfo-branch, RTL sequence abstraction (part 1)
- References: <Pine.LNX.4.44.0601070754220.8196-100000@www.eyesopen.com>
On Sat, 2006-01-07 at 15:48, Roger Sayle wrote:
> One reason that using a constant, does so well relatively on the ARM
> is that the ARM backend currently doesn't honor optimize_size, so all
> of the values returned are cycle counts rather than size estimates.
> Given that ARM is a RISC architecture, using a constant is probably a
> better approximation than its rtx_costs. This is easily fixed, and
> would allow not only your new pass, but combine, ivopts, expand and
> numerous other optimizers to produce better code density.
Eh? So what do you think this code in arm_override_options is doing?
if (optimize_size)
targetm.rtx_costs = arm_size_rtx_costs;
else
targetm.rtx_costs = all_cores[(int)arm_tune].rtx_costs;