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Re: [PATCH] Improve integer division on IA-64
On Tue, Dec 20, 2005 at 08:14:48AM -0700, Roger Sayle wrote:
> but the inlined version contains
>
> setf.sig fx = rx
> ;;
> setf.sig fy = ry
...
> I'm not sure which code in GCC is responsible for placing the stop bits
> in the inlined division code, but perhaps the ia64 scheduler and/or flow
> isn't correctly modeling the fact that these two instructions are
> pairable/independent and have very large latencies?
No, the problem is going to be random, and largely influenced by
the surrounding code.
You'll find that we determined that *some* stop bit was going to
be necessary, due to two insns that you didn't list. We looked
forward through the available insns and picked some that would
fit in the current bundle, maximizing the number of insns issued
in the current bundle. But we ran out of room and couldn't fit
both setf insns.
Anyway, are you sure you're analyzing this properly? It's not
like we should be stalling the issue of the next bundle until
the result in fx is available...
r~