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Special-case rotating a 32-bit quantity by 16 bits, using a single mux2 rather than multiple instructions. Bootstrapped and tested on ia64-unknown-linux-gnu. 2005-12-02 Jan Beulich <jbeulich@novell.com> * config/ia64/ia64.md (rotlsi3_internal): Don't split if rotating by 16 bits. Provide insn pattern for this case. --- /home/jbeulich/src/gcc/trunk/2005-12-01/gcc/config/ia64/ia64.md 2005-12-01 10:48:28.000000000 +0100 +++ 2005-12-01/gcc/config/ia64/ia64.md 2005-12-02 08:29:02.856610572 +0100 @@ -4453,8 +4455,8 @@ (rotate:SI (match_operand:SI 1 "gr_register_operand" "r") (match_operand:SI 2 "shift_32bit_count_operand" "n")))] "" - "#" - "reload_completed" + "mux2 %0 = %1, 0xe1" + "reload_completed && INTVAL (operands[2]) != 16" [(set (match_dup 3) (ior:DI (zero_extend:DI (match_dup 1)) (ashift:DI (zero_extend:DI (match_dup 1)) (const_int 32)))) @@ -4463,7 +4465,8 @@ { operands[3] = gen_rtx_REG (DImode, REGNO (operands[0])); operands[2] = GEN_INT (32 - INTVAL (operands[2])); -}) +} + [(set_attr "itanium_class" "mmshf")]) ;; :::::::::::::::::::: ;; ::
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gcc-trunk-ia64-rotlsi-half.patch
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