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Re: -fasm=intel not always suppported
- From: Mike Stump <mrs at apple dot com>
- To: Andrew Pinski <pinskia at physics dot uc dot edu>
- Cc: gcc-patches at gcc dot gnu dot org (gcc-patches at gcc dot gnu dot org Patches)
- Date: Tue, 15 Nov 2005 15:14:14 -0800
- Subject: Re: -fasm=intel not always suppported
- References: <200511152040.jAFKeEiF011116@earth.phy.uc.edu>
On Nov 15, 2005, at 12:40 PM, Andrew Pinski wrote:
Also x86 inline-asm is harder than what you put it.
? You lost me here.
It is not a matter of geting the constraints right but a matter of
saying which register gets clobbered and which register gets placed
where.
Yes. This is trivial and most of the work has already been done.
An example of this is rdtsc which takes no operands but places its
result in
eax:edx, how would you write that in MS style asm?
Surely there are tons of ways, all of them work, I might do it this way:
long long foo() {
union {
struct {
int h;
int l;
} i;
long long ll;
} v;
asm {
rdtsc
mov v.i.h, edx
mov v.i.l, eax
}
return v.ll;
}
but don't flame me for it if you like another spelling.
You would have to use an extra mov instruction like
Yup, that works too (s/ebx/edx/ of course).
what happens if you write it as:
long long f(void)
{
asm { rdtsc }
return 0;
}
This has the same answer as if you had written:
asm ("rdtsc" : : "eax", "edx");
return 0;
Seems confused to me to write that, but, one can. Hope I got the
spelling close enough for you to know what I meant. I still find gcc
asm syntax hard to write at times.
Does your code mark eax and ebx as being clobbered
Yes, of course.