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[PATCH] Bring ARM VxWorks target configuration up to date


The next patch in the series, for ARM.  No toplevel changes required,
and the common-code changes have already been checked in.



2005-09-01  Phil Edwards  <phil@codesourcery.com>

	* config.gcc (arm-wrs-vxworks):  Bring up to date for VxWorks 6.
	* config/arm/t-vxworks:  Likewise.  Adjust multilibs, use fp-bit.c
	and lib1funcs.asm.
	* config/arm/vxworks.h:  Likewise.


Index: config.gcc
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config.gcc,v
retrieving revision 1.565
diff -u -p -r1.565 config.gcc
--- config.gcc	1 Sep 2005 17:44:37 -0000	1.565
+++ config.gcc	1 Sep 2005 17:59:23 -0000
@@ -653,8 +653,8 @@ arm-semi-aof | armel-semi-aof)
 	tmake_file="arm/t-arm arm/t-semi"
 	;;
 arm-wrs-vxworks)
-	tm_file="dbxelf.h elfos.h svr4.h vxworks.h arm/elf.h arm/aout.h arm/arm.h arm/vxworks.h"
-	tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
+	tm_file="dbxelf.h elfos.h svr4.h vx-common.h vxworks.h arm/elf.h arm/aout.h arm/arm.h arm/vxworks.h"
+	tmake_file="${tmake_file} arm/t-vxworks"
 	;;
 arm*-*-freebsd*|strongarm*-*-freebsd*)
 	tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h arm/aout.h arm/freebsd.h arm/arm.h"
Index: config/arm/t-vxworks
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/t-vxworks,v
retrieving revision 1.1
diff -u -p -r1.1 t-vxworks
--- config/arm/t-vxworks	23 Oct 2003 05:16:53 -0000	1.1
+++ config/arm/t-vxworks	1 Sep 2005 17:59:23 -0000
@@ -1,10 +1,34 @@
-# Multilibs for VxWorks.
+LIB1ASMSRC = arm/lib1funcs.asm
+LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX
 
-MULTILIB_OPTIONS = \
-  t4/t4be/t4t/t4tbe/t5/t5be/t5t/t5tbe/txscale/txscalebe
+# We want fine grained libraries, so use the new code to build the
+# floating point emulation libraries.
+FPBIT = fp-bit.c
+DPBIT = dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+	echo '#define FLOAT' > fp-bit.c
+	echo '#ifndef __ARMEB__' >> fp-bit.c
+	echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
+	echo '#endif' >> fp-bit.c
+	cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+	echo '#ifndef __ARMEB__' > dp-bit.c
+	echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
+	echo '#define FLOAT_WORD_ORDER_MISMATCH' >> dp-bit.c
+	echo '#endif' >> dp-bit.c
+	cat $(srcdir)/config/fp-bit.c >> dp-bit.c
 
-MULTILIB_DIRNAMES = \
-  ARMARCH4gnu ARMARCH4gnube ARMARCH4_Tgnu ARMARCH4_Tgnube \
-  ARMARCH5gnu ARMARCH5gnube ARMARCH5_Tgnu ARMARCH5_Tgnube \
-  XSCALEgnu XSCALEgnube
+# Currently there is a bug somewhere in GCC's alias analysis
+# or scheduling code that is breaking _fpmul_parts in fp-bit.c.
+# Disabling function inlining is a workaround for this problem.
+TARGET_LIBGCC2_CFLAGS = -Dinhibit_libc -fno-inline
+
+MULTILIB_OPTIONS = \
+  mrtp fPIC \
+  t4/t4be/t4t/t4tbe/t5/t5be/t5t/t5tbe/tstrongarm/txscale/txscalebe
+MULTILIB_DIRNAMES =
+MULTILIB_MATCHES = fPIC=fpic
+MULTILIB_EXCEPTIONS = fPIC* mrtp/fPIC/*t[45]t*
 
Index: config/arm/vxworks.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/vxworks.h,v
retrieving revision 1.4
diff -u -p -r1.4 vxworks.h
--- config/arm/vxworks.h	25 Jun 2005 01:20:56 -0000	1.4
+++ config/arm/vxworks.h	1 Sep 2005 17:59:23 -0000
@@ -1,37 +1,38 @@
-/* Definitions of target machine for GCC,
-   for ARM with targetting the VXWorks run time environment. 
-   Copyright (C) 1999, 2000, 2003, 2004 Free Software Foundation, Inc.
+/* Definitions of target machine for GNU compiler,
+   for ARM targetting the VxWorks runtime environment. 
+   Copyright (C) 1999, 2000, 2003, 2004, 2005 Free Software Foundation, Inc.
 
    Contributed by: Mike Stump <mrs@wrs.com>
    Brought up to date by CodeSourcery, LLC.
    
-This file is part of GCC.
-
-GCC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GCC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING.  If not, write to
-the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-Boston, MA 02110-1301, USA.  */
+   This file is part of GCC.
 
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 2, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING.  If not, write to
+   the Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
 
 #define TARGET_OS_CPP_BUILTINS()		\
   do {						\
     builtin_define ("__vxworks");		\
+    builtin_define ("__VXWORKS__");		\
+    builtin_define ("__arm");			\
     if (TARGET_BIG_END)				\
       builtin_define ("ARMEB");			\
     else					\
       builtin_define ("ARMEL");			\
 						\
-    if (arm_is_xscale)				\
+    if (arm_arch_xscale)			\
       builtin_define ("CPU=XSCALE");		\
     else if (arm_arch5)				\
       builtin_define ("CPU=ARMARCH5");		\
@@ -44,40 +45,47 @@ Boston, MA 02110-1301, USA.  */
       }						\
   } while (0)
 
+#undef OVERRIDE_OPTIONS
+#define OVERRIDE_OPTIONS do {			\
+    arm_override_options ();			\
+    VXWORKS_OVERRIDE_OPTIONS;			\
+} while (0)
+
+/* Subsume the arm/elf.h definition, and add RTP hooks.  */
+#undef  SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "-D__ELF__" VXWORKS_ADDITIONAL_CPP_SPEC
+
 #undef  CC1_SPEC
 #define CC1_SPEC							\
-"%{t4:        -mlittle-endian -march=armv4 ;			\
-   t4be:      -mbig-endian -march=armv4 ;			\
+"%{tstrongarm:-mlittle-endian -mcpu=strongarm ;				\
+   t4:        -mlittle-endian -march=armv4 ;				\
+   t4be:      -mbig-endian -march=armv4 ;				\
    t4t:       -mthumb -mthumb-interwork -mlittle-endian -march=armv4t ;	\
    t4tbe:     -mthumb -mthumb-interwork -mbig-endian -march=armv4t ;	\
-   t5:        -mlittle-endian -march=armv5 ;			\
-   t5be:      -mbig-endian -march=armv5 ;			\
+   t5:        -mlittle-endian -march=armv5 ;				\
+   t5be:      -mbig-endian -march=armv5 ;				\
    t5t:       -mthumb -mthumb-interwork -mlittle-endian -march=armv5 ;	\
    t5tbe:     -mthumb -mthumb-interwork -mbig-endian -march=armv5 ;	\
-   txscale:   -mlittle-endian -mcpu=xscale ;			\
-   txscalebe: -mbig-endian -mcpu=xscale ;			\
-            : -march=armv4}"
+   txscale:   -mlittle-endian -mcpu=xscale ;				\
+   txscalebe: -mbig-endian -mcpu=xscale ;				\
+            : -march=armv4} 						\
+  %{fPIC:%{t4t*|t5t*:%ePIC and thumb are incompatible}}"
 
 /* The -Q options from svr4.h aren't understood and must be removed.  */
 #undef  ASM_SPEC
-#define ASM_SPEC \
-  "%{v:-V} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}"
-
-/* VxWorks does all the library stuff itself.  */
-#undef  LIB_SPEC
-#define LIB_SPEC 	""
+#define ASM_SPEC "%{mbig-endian|t4be|t4tbe|t5be|t5tbe|txscalebe:-EB} \
+%{v:-v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}"
 
-/* VxWorks uses object files, not loadable images.  make linker just
-   combine objects.  */
-#undef  LINK_SPEC
-#define LINK_SPEC 	"-r"
+#undef LINK_SPEC
+#define LINK_SPEC VXWORKS_LINK_SPEC \
+  "%{mbig-endian|t4be|t4tbe|t5be|t5tbe|txscalebe: -EB}"
 
-/* VxWorks provides the functionality of crt0.o and friends itself.  */
+#undef  LIB_SPEC
+#define LIB_SPEC VXWORKS_LIB_SPEC
 #undef  STARTFILE_SPEC
-#define STARTFILE_SPEC 	""
-
+#define STARTFILE_SPEC VXWORKS_STARTFILE_SPEC
 #undef  ENDFILE_SPEC
-#define ENDFILE_SPEC 	""
+#define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
 
 #undef  TARGET_VERSION
 #define TARGET_VERSION	fputs (" (ARM/VxWorks)", stderr);
@@ -85,11 +93,22 @@ Boston, MA 02110-1301, USA.  */
 /* There is no default multilib.  */
 #undef MULTILIB_DEFAULTS
 
-#undef  ASM_FILE_START
-#define ASM_FILE_START(STREAM) 						\
-  do 									\
-    {									\
-      fprintf (STREAM, "%s Generated by GCC %s for ARM/VxWorks\n",	\
-	       ASM_COMMENT_START, version_string);			\
-    }									\
-  while (0)
+/* We believe that VxWorks traps unaligned accesses.  So,
+   TARGET_DEFAULT here is the same as for arm-none-elf, but with the
+   addition of ARM_FLAG_MMU_TRAPS.
+   We also specify VFP float to give natural float endianness.  */
+#undef  TARGET_DEFAULT_FLOAT_ABI
+#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
+#undef  FPUTYPE_DEFAULT
+#define FPUTYPE_DEFAULT FPUTYPE_VFP
+#undef  TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_APCS_FRAME)
+
+/* No _mcount profiling on VxWorks.  */
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(FILE,LABELNO) VXWORKS_FUNCTION_PROFILER(FILE,LABELNO)
+
+/* We want to be compatible with a version of "2.96" at one point in
+   the past before this macro was changed.  */
+#undef  DEFAULT_STRUCTURE_SIZE_BOUNDARY
+#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8


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