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Re: RFD: More flexibility in defining addressing modes


Ian Lance Taylor wrote:
Bernd Schmidt <bernds_cb1@t-online.de> writes:


At this point, would it be easier to understand if we instead passed
the complete address to the target in RTL, and the target in the one
case returned the register class, and in the other checked the regno?

Well, you can have several registers in one address, and if you pass the whole thing to the backend it won't know which part to look at.


I was imagining that one would pass in the address of the REG in
question.

One problem is that parts of the address may have had reloads applied to them, so the port may be looking at the wrong thing if it looks at the whole address.


I don't have any particularly strong objection to your
patch, it just seems to make an already confusing situation somewhat
more confusing.  Adding the RTX code solves the nonorthoganality on
the Blackfin, but there are other types of nonorthogonality in
existing processors, like the MIPS16 in which different registers
support different maximum offsets in unextended instructions.

Hmm, probably solvable by passing in even more information than the index_code, but it gets nasty.


The Blackfin also has some nonorthogonalities which aren't handled with this approach - which register you can load sometimes depends on which addressing mode you use. I currently see no good way to teach reload about this kind of thing :-(

I now have a finished patch which I was going to check in, but then I remembered we're in stage 3. Bummer.


Bernd



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