This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |
Other format: | [Raw text] |
Bernd Schmidt <bernds_cb1@t-online.de> writes:
At this point, would it be easier to understand if we instead passed the complete address to the target in RTL, and the target in the one case returned the register class, and in the other checked the regno?
Well, you can have several registers in one address, and if you pass the whole thing to the backend it won't know which part to look at.
I was imagining that one would pass in the address of the REG in question.
I don't have any particularly strong objection to your patch, it just seems to make an already confusing situation somewhat more confusing. Adding the RTX code solves the nonorthoganality on the Blackfin, but there are other types of nonorthogonality in existing processors, like the MIPS16 in which different registers support different maximum offsets in unextended instructions.
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |