This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: PATCH: PR target/23485: [ia64]: Integer dvide by zero doesn't raise a signal
On Sat, Aug 20, 2005 at 07:23:55PM -0700, Richard Henderson wrote:
> On Sat, Aug 20, 2005 at 11:32:01AM -0700, H. J. Lu wrote:
> > * config/ia64/ia64.md (divsi3): Check divide by zero.
> > (modsi3): Likewise.
> > (udivsi3): Likewise.
> > (umodsi3): Likewise.
> > (divdi3): Likewise.
> > (moddi3): Likewise.
> > (udivdi3): Likewise.
> > (umoddi3): Likewise.
>
> Not ok. You've got too many traps. Modulus, for instance,
> winds up with two -- one from the mod, and one from the div.
>
How about this?
H.J.
---
2005-08-20 H.J. Lu <hongjiu.lu@intel.com>
PR target/23485
* config/ia64/ia64.md (divsi3): Check divide by zero.
(udivsi3): Likewise.
(divdi3): Likewise.
(udivdi3): Likewise.
--- gcc/config/ia64/ia64.md.in-zero 2005-05-18 08:59:54.000000000 -0700
+++ gcc/config/ia64/ia64.md 2005-08-20 11:23:37.666103880 -0700
@@ -1973,6 +1973,9 @@
{
rtx op1_xf, op2_xf, op0_xf, op0_di, twon34, twon34_exp;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (SImode),
+ CONST1_RTX (SImode)));
+
op0_xf = gen_reg_rtx (XFmode);
op0_di = gen_reg_rtx (DImode);
@@ -2030,6 +2036,9 @@
{
rtx op1_xf, op2_xf, op0_xf, op0_di, twon34, twon34_exp;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (SImode),
+ CONST1_RTX (SImode)));
+
op0_xf = gen_reg_rtx (XFmode);
op0_di = gen_reg_rtx (DImode);
@@ -2398,6 +2410,9 @@
{
rtx op1_xf, op2_xf, op0_xf;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (DImode),
+ CONST1_RTX (DImode)));
+
op0_xf = gen_reg_rtx (XFmode);
if (CONSTANT_P (operands[1]))
@@ -2444,6 +2462,9 @@
{
rtx op1_xf, op2_xf, op0_xf;
+ emit_insn (gen_cond_trap (EQ, operands[2], CONST0_RTX (DImode),
+ CONST1_RTX (DImode)));
+
op0_xf = gen_reg_rtx (XFmode);
if (CONSTANT_P (operands[1]))