This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH] S/390: backend fixes for -mzarch used with -m31
Hi,
Here is a gcc 4.0 version of the patch.
Bootstrapped on gcc 4.0 on s390 and s390x.
OK?
Bye,
-Andreas-
2005-08-11 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.c (s390_extract_part, s390_single_part):
Type cast added.
(s390_const_ok_for_constraint_p): Added SImode to the N constraint.
(s390_output_mi_thunk): Don't use lg on 31 bit.
* config/s390/s390.md ("*movdi_31", "*movdf_31"): Added lmy and stmy.
("*llgt_sisi" and splitter): Replaced TARGET_64BIT with TARGET_ZARCH.
Index: gcc/config/s390/s390.c
===================================================================
--- gcc/config/s390/s390.c.orig 2005-08-12 14:19:45.000000000 +0200
+++ gcc/config/s390/s390.c 2005-08-12 14:20:16.000000000 +0200
@@ -1137,7 +1137,8 @@ s390_extract_part (rtx op, enum machine_
unsigned HOST_WIDE_INT value = 0;
int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
int part_bits = GET_MODE_BITSIZE (mode);
- unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
+ unsigned HOST_WIDE_INT part_mask
+ = ((unsigned HOST_WIDE_INT)1 << part_bits) - 1;
int i;
for (i = 0; i < max_parts; i++)
@@ -1166,7 +1167,8 @@ s390_single_part (rtx op,
{
unsigned HOST_WIDE_INT value = 0;
int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
- unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
+ unsigned HOST_WIDE_INT part_mask
+ = ((unsigned HOST_WIDE_INT)1 << GET_MODE_BITSIZE (part_mode)) - 1;
int i, part = -1;
if (GET_CODE (op) != CONST_INT)
@@ -1867,8 +1869,9 @@ s390_const_ok_for_constraint_p (HOST_WID
switch (str[2])
{
- case 'H': part_mode = HImode; break;
- case 'Q': part_mode = QImode; break;
+ case 'Q': part_mode = QImode; break;
+ case 'H': part_mode = HImode; break;
+ case 'S': part_mode = SImode; break;
default: return 0;
}
@@ -8392,12 +8395,12 @@ s390_output_mi_thunk (FILE *file, tree t
{
if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
{
- output_asm_insn ("lg\t%4,0(%1)", op);
+ output_asm_insn ("l\t%4,0(%1)", op);
output_asm_insn ("a\t%1,%3(%4)", op);
}
else if (DISP_IN_RANGE (vcall_offset))
{
- output_asm_insn ("lg\t%4,0(%1)", op);
+ output_asm_insn ("l\t%4,0(%1)", op);
output_asm_insn ("ay\t%1,%3(%4)", op);
}
else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
Index: gcc/config/s390/s390.md
===================================================================
--- gcc/config/s390/s390.md.orig 2005-08-12 14:19:45.000000000 +0200
+++ gcc/config/s390/s390.md 2005-08-12 14:29:47.000000000 +0200
@@ -927,12 +927,14 @@
s390_split_access_reg (operands[0], &operands[3], &operands[4]);")
(define_insn "*movdi_31"
- [(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,o,!*f,!*f,!*f,!R,!T,Q")
- (match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,R,T,*f,*f,Q"))]
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,Q,S,d,o,!*f,!*f,!*f,!R,!T,Q")
+ (match_operand:DI 1 "general_operand" "Q,S,d,d,dKm,d,*f,R,T,*f,*f,Q"))]
"!TARGET_64BIT"
"@
lm\t%0,%N0,%S1
+ lmy\t%0,%N0,%S1
stm\t%1,%N1,%S0
+ stmy\t%1,%N1,%S0
#
#
ldr\t%0,%1
@@ -941,8 +943,8 @@
std\t%1,%0
stdy\t%1,%0
#"
- [(set_attr "op_type" "RS,RS,*,*,RR,RX,RXY,RX,RXY,SS")
- (set_attr "type" "lm,stm,*,*,floadd,floadd,floadd,fstored,fstored,*")])
+ [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,SS")
+ (set_attr "type" "lm,lm,stm,stm,*,*,floadd,floadd,floadd,fstored,fstored,*")])
(define_split
[(set (match_operand:DI 0 "nonimmediate_operand" "")
@@ -1386,8 +1388,8 @@
(set_attr "type" "floadd,floadd,floadd,fstored,fstored,lr,load,store,*")])
(define_insn "*movdf_31"
- [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,Q,d,o,Q")
- (match_operand:DF 1 "general_operand" "f,R,T,f,f,Q,d,dKm,d,Q"))]
+ [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,Q,S,d,o,Q")
+ (match_operand:DF 1 "general_operand" "f,R,T,f,f,Q,S,d,d,dKm,d,Q"))]
"!TARGET_64BIT"
"@
ldr\t%0,%1
@@ -1396,12 +1398,15 @@
std\t%1,%0
stdy\t%1,%0
lm\t%0,%N0,%S1
+ lm\t%0,%N0,%S1
+ stm\t%1,%N1,%S0
stm\t%1,%N1,%S0
#
#
#"
- [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RS,RS,*,*,SS")
- (set_attr "type" "floadd,floadd,floadd,fstored,fstored,lm,stm,*,*,*")])
+ [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*,SS")
+ (set_attr "type" "floadd,floadd,floadd,fstored,fstored,\
+ lm,lm,stm,stm,*,*,*")])
(define_split
[(set (match_operand:DF 0 "nonimmediate_operand" "")
@@ -2685,7 +2690,7 @@
[(set (match_operand:SI 0 "register_operand" "=d,d")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "d,m")
(const_int 2147483647)))]
- "TARGET_64BIT"
+ "TARGET_ZARCH"
"@
llgtr\t%0,%1
llgt\t%0,%1"
@@ -2717,7 +2722,7 @@
(and:DI (match_operand:DI 1 "nonimmediate_operand" "")
(const_int 2147483647)))
(clobber (reg:CC 33))]
- "TARGET_64BIT && reload_completed"
+ "TARGET_ZARCH && reload_completed"
[(set (match_dup 0)
(and:DI (match_dup 1)
(const_int 2147483647)))]