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[patch] gcc/*: Fix comment typos.
- From: Kazu Hirata <kazu at codesourcery dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sun, 31 Jul 2005 20:55:56 -0700
- Subject: [patch] gcc/*: Fix comment typos.
Hi,
Committed as obvious.
Kazu Hirata
2005-08-01 Kazu Hirata <kazu@codesourcery.com>
* dwarf2out.c, fold-const.c, ipa-type-escape.c,
loop-invariant.c, predict.c, predict.def, reload1.c, reorg.c,
tree-sra.c, config/arm/arm.c, config/crx/crx.c,
config/i386/i386.c, config/mips/mips.h,
config/rs6000/rs6000.h, config/sh/sh.c,
config/stormy16/stormy16.c: Fix comment typos.
Index: dwarf2out.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/dwarf2out.c,v
retrieving revision 1.608
diff -u -d -p -r1.608 dwarf2out.c
--- dwarf2out.c 26 Jul 2005 02:56:42 -0000 1.608
+++ dwarf2out.c 1 Aug 2005 03:48:52 -0000
@@ -13078,7 +13078,7 @@ dwarf2out_decl (tree decl)
declarations. We have to check DECL_INITIAL instead. That's because
the C front-end supports some weird semantics for "extern inline"
function definitions. These can get inlined within the current
- translation unit (an thus, we need to generate Dwarf info for their
+ translation unit (and thus, we need to generate Dwarf info for their
abstract instances so that the Dwarf info for the concrete inlined
instances can have something to refer to) but the compiler never
generates any out-of-lines instances of such things (despite the fact
Index: fold-const.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/fold-const.c,v
retrieving revision 1.612
diff -u -d -p -r1.612 fold-const.c
--- fold-const.c 30 Jul 2005 14:39:07 -0000 1.612
+++ fold-const.c 1 Aug 2005 03:48:53 -0000
@@ -2029,7 +2029,7 @@ fold_convert (tree type, tree arg)
}
}
-/* Return false if expr can be assumed not to be an value, true
+/* Return false if expr can be assumed not to be an lvalue, true
otherwise. */
static bool
Index: ipa-type-escape.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/ipa-type-escape.c,v
retrieving revision 2.3
diff -u -d -p -r2.3 ipa-type-escape.c
--- ipa-type-escape.c 26 Jul 2005 13:53:51 -0000 2.3
+++ ipa-type-escape.c 1 Aug 2005 03:48:53 -0000
@@ -1622,7 +1622,7 @@ close_type_full_escape (tree type)
}
/* Transitively close the addressof bitmap for the type with UID.
- This means that if we had a.b and b.c, a would have both b an c in
+ This means that if we had a.b and b.c, a would have both b and c in
its maps. */
static bitmap
Index: loop-invariant.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/loop-invariant.c,v
retrieving revision 2.15
diff -u -d -p -r2.15 loop-invariant.c
--- loop-invariant.c 25 Jun 2005 02:00:35 -0000 2.15
+++ loop-invariant.c 1 Aug 2005 03:48:53 -0000
@@ -470,7 +470,7 @@ find_invariant_insn (rtx insn, bool alwa
create_new_invariant (def, insn, depends_on, always_executed);
}
-/* Record registers used in INSN that have an unique invariant definition.
+/* Record registers used in INSN that have a unique invariant definition.
DF is the dataflow object. */
static void
Index: predict.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/predict.c,v
retrieving revision 1.154
diff -u -d -p -r1.154 predict.c
--- predict.c 21 Jul 2005 07:24:07 -0000 1.154
+++ predict.c 1 Aug 2005 03:48:53 -0000
@@ -1557,11 +1557,11 @@ typedef struct block_info_def
/* Similar information for edges. */
typedef struct edge_info_def
{
- /* In case edge is an loopback edge, the probability edge will be reached
+ /* In case edge is a loopback edge, the probability edge will be reached
in case header is. Estimated number of iterations of the loop can be
then computed as 1 / (1 - back_edge_prob). */
sreal back_edge_prob;
- /* True if the edge is an loopback edge in the natural loop. */
+ /* True if the edge is a loopback edge in the natural loop. */
unsigned int back_edge:1;
} *edge_info;
Index: predict.def
===================================================================
RCS file: /cvs/gcc/gcc/gcc/predict.def,v
retrieving revision 1.22
diff -u -d -p -r1.22 predict.def
--- predict.def 25 Jun 2005 02:00:44 -0000 1.22
+++ predict.def 1 Aug 2005 03:48:53 -0000
@@ -41,7 +41,7 @@ DEF_PREDICTOR (PRED_COMBINED, "combined"
/* An outcome estimated by Dempster-Shaffer theory. */
DEF_PREDICTOR (PRED_DS_THEORY, "DS theory", PROB_ALWAYS, 0)
-/* An combined heuristics using probability determined by first
+/* A combined heuristics using probability determined by first
matching heuristics from this list. */
DEF_PREDICTOR (PRED_FIRST_MATCH, "first match", PROB_ALWAYS, 0)
Index: reload1.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/reload1.c,v
retrieving revision 1.477
diff -u -d -p -r1.477 reload1.c
--- reload1.c 25 Jun 2005 02:00:54 -0000 1.477
+++ reload1.c 1 Aug 2005 03:48:54 -0000
@@ -1042,7 +1042,7 @@ reload (rtx first, int global)
/* If we already deleted the insn or if it may trap, we can't
delete it. The latter case shouldn't happen, but can
if an insn has a variable address, gets a REG_EH_REGION
- note added to it, and then gets converted into an load
+ note added to it, and then gets converted into a load
from a constant address. */
if (NOTE_P (equiv_insn)
|| can_throw_internal (equiv_insn))
Index: reorg.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/reorg.c,v
retrieving revision 1.109
diff -u -d -p -r1.109 reorg.c
--- reorg.c 5 Jul 2005 16:20:14 -0000 1.109
+++ reorg.c 1 Aug 2005 03:48:58 -0000
@@ -1934,7 +1934,7 @@ reorg_redirect_jump (rtx jump, rtx nlabe
that reference values used in INSN. If we find one, then we move the
REG_DEAD note to INSN.
- This is needed to handle the case where an later insn (after INSN) has a
+ This is needed to handle the case where a later insn (after INSN) has a
REG_DEAD note for a register used by INSN, and this later insn subsequently
gets moved before a CODE_LABEL because it is a redundant insn. In this
case, mark_target_live_regs may be confused into thinking the register
Index: tree-sra.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree-sra.c,v
retrieving revision 2.68
diff -u -d -p -r2.68 tree-sra.c
--- tree-sra.c 20 Jul 2005 01:18:23 -0000 2.68
+++ tree-sra.c 1 Aug 2005 03:48:58 -0000
@@ -724,7 +724,7 @@ sra_walk_expr (tree *expr_p, block_stmt_
goto use_all;
case ARRAY_RANGE_REF:
- /* Similarly, an subrange reference is used to modify indexing. Which
+ /* Similarly, a subrange reference is used to modify indexing. Which
means that the canonical element names that we have won't work. */
goto use_all;
Index: config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.470
diff -u -d -p -r1.470 arm.c
--- config/arm/arm.c 30 Jul 2005 00:16:35 -0000 1.470
+++ config/arm/arm.c 1 Aug 2005 03:48:59 -0000
@@ -14738,7 +14738,7 @@ arm_unwind_emit_stm (FILE * asm_out_file
if (reg < 16)
{
/* The function prologue may also push pc, but not annotate it as it is
- never restored. We turn this into an stack pointer adjustment. */
+ never restored. We turn this into a stack pointer adjustment. */
if (nregs * 4 == offset - 4)
{
fprintf (asm_out_file, "\t.pad #4\n");
Index: config/crx/crx.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/crx/crx.c,v
retrieving revision 1.3
diff -u -d -p -r1.3 crx.c
--- config/crx/crx.c 26 Jul 2005 13:53:52 -0000 1.3
+++ config/crx/crx.c 1 Aug 2005 03:48:59 -0000
@@ -80,7 +80,7 @@
((GET_CODE(X) == CONST_INT \
&& SIGNED_INT_FITS_N_BITS(INTVAL(X),n)) ? 1 : 0)
-/* Nonzero if the rtx X is a unsigned const int of n bits */
+/* Nonzero if the rtx X is an unsigned const int of n bits. */
#define RTX_UNSIGNED_INT_FITS_N_BITS(X,n) \
((GET_CODE(X) == CONST_INT \
&& UNSIGNED_INT_FITS_N_BITS(INTVAL(X),n)) ? 1 : 0)
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.846
diff -u -d -p -r1.846 i386.c
--- config/i386/i386.c 31 Jul 2005 09:12:28 -0000 1.846
+++ config/i386/i386.c 1 Aug 2005 03:49:00 -0000
@@ -1791,7 +1791,7 @@ x86_64_elf_unique_section (tree decl, in
/* This says how to output assembler code to declare an
uninitialized external linkage data object.
- For medim model x86-64 we need to use .largecomm opcode for
+ For medium model x86-64 we need to use .largecomm opcode for
large objects. */
void
x86_elf_aligned_common (FILE *file,
@@ -5789,7 +5789,7 @@ legitimate_address_p (enum machine_mode
return FALSE;
}
-/* Return an unique alias set for the GOT. */
+/* Return a unique alias set for the GOT. */
static HOST_WIDE_INT
ix86_GOT_alias_set (void)
Index: config/mips/mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.401
diff -u -d -p -r1.401 mips.h
--- config/mips/mips.h 29 Jul 2005 17:25:24 -0000 1.401
+++ config/mips/mips.h 1 Aug 2005 03:49:00 -0000
@@ -1663,7 +1663,7 @@ extern enum reg_class mips_char_to_class
#define REG_CLASS_FROM_LETTER(C) mips_char_to_class[(unsigned char)(C)]
-/* True if VALUE is a unsigned 6-bit number. */
+/* True if VALUE is an unsigned 6-bit number. */
#define UIMM6_OPERAND(VALUE) \
(((VALUE) & ~(unsigned HOST_WIDE_INT) 0x3f) == 0)
Index: config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.379
diff -u -d -p -r1.379 rs6000.h
--- config/rs6000/rs6000.h 21 Jul 2005 07:30:00 -0000 1.379
+++ config/rs6000/rs6000.h 1 Aug 2005 03:49:00 -0000
@@ -1109,7 +1109,7 @@ enum reg_class
'T' is a constant that can be placed into a 32-bit mask operand
'U' is for V.4 small data references.
'W' is a vector constant that can be easily generated (no mem refs).
- 'Y' is a indexed or word-aligned displacement memory operand.
+ 'Y' is an indexed or word-aligned displacement memory operand.
'Z' is an indexed or indirect memory operand.
't' is for AND masks that can be performed by two rldic{l,r} insns. */
Index: config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.339
diff -u -d -p -r1.339 sh.c
--- config/sh/sh.c 20 Jul 2005 05:03:21 -0000 1.339
+++ config/sh/sh.c 1 Aug 2005 03:49:01 -0000
@@ -1755,7 +1755,7 @@ unspec_caller_rtx_p (rtx pat)
}
/* Indicate that INSN cannot be duplicated. This is true for insn
- that generates an unique label. */
+ that generates a unique label. */
static bool
sh_cannot_copy_insn_p (rtx insn)
Index: config/stormy16/stormy16.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/stormy16/stormy16.c,v
retrieving revision 1.80
diff -u -d -p -r1.80 stormy16.c
--- config/stormy16/stormy16.c 12 Jul 2005 03:48:20 -0000 1.80
+++ config/stormy16/stormy16.c 1 Aug 2005 03:49:01 -0000
@@ -2479,7 +2479,7 @@ combine_bnp (rtx insn)
if (need_extend)
{
- /* LT and GE conditionals should have an sign extend before
+ /* LT and GE conditionals should have a sign extend before
them. */
for (and = prev_real_insn (insn); and; and = prev_real_insn (and))
{