This is the mail archive of the mailing list for the GCC project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: PATCH RFA: Use clz for MIPS ffs

Ian Lance Taylor <> writes:
> +(define_expand "ffs<mode>2"
> +  [(set (match_operand:GPR 0 "register_operand" "")
> +	(ffs:GPR (match_operand:GPR 1 "register_operand" "")))]
> +{
> +  rtx r1, r2, r3, r4;
> +
> +  r1 = gen_reg_rtx (<MODE>mode);
> +  r2 = gen_reg_rtx (<MODE>mode);
> +  r3 = gen_reg_rtx (<MODE>mode);
> +  r4 = gen_reg_rtx (<MODE>mode);
> +  emit_insn (gen_neg<mode>2 (r1, operands[1]));
> +  emit_insn (gen_and<mode>3 (r2, operands[1], r1));
> +  emit_insn (gen_clz<mode>2 (r3, r2));
> +  emit_move_insn (r4, GEN_INT (GET_MODE_BITSIZE (<MODE>mode)));
> +  emit_insn (gen_sub<mode>3 (operands[0], r4, r3));
> +  DONE;
> +})

OK, I know this going to be annoying, but there's nothing really
MIPS-specific about this expansion either, is there?  It's remarkably
similar to the ARM version, for instance.

Since clz is a known rtl operation, this feels like the sort of
fallback that should be handled in the middle end, which can check
for the existence of a clz instruction using HAVE_clz<mode>.

...who suspects he'll be accused of making the best the enemy
of the good enough...

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]