Blackfin doc fixes

[Bernd Schmidt <bernds_cb1 at t-online dot de>]

This fixes a few errors and omissions in the Blackfin-specific 
documentation on the mainline.


Bernd
	* doc/extend.texi (Blackfin Built-in Functions): New section.
	* doc/invoke.texi (mcsync-anomaly, mno-csync-anomaly): Fix the
	@opindex.

Index: doc/extend.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/extend.texi,v
retrieving revision 1.257
diff -c -p -r1.257 extend.texi
*** doc/extend.texi	27 Jun 2005 12:17:35 -0000	1.257
--- doc/extend.texi	12 Jul 2005 10:36:31 -0000
*************** instructions, but allow the compiler to 
*** 5766,5771 ****
--- 5766,5772 ----
  @menu
  * Alpha Built-in Functions::
  * ARM Built-in Functions::
+ * Blackfin Built-in Functions::
  * FR-V Built-in Functions::
  * X86 Built-in Functions::
  * MIPS Paired-Single Support::
*************** long long __builtin_arm_wxor (long long,
*** 6002,6007 ****
--- 6003,6022 ----
  long long __builtin_arm_wzero ()
  @end smallexample
  
+ @node Blackfin Built-in Functions
+ @subsection Blackfin Built-in Functions
+ 
+ Currently, there are two Blackfin-specific built-in functions.  These are
+ used for generating @code{CSYNC} and @code{SSYNC} machine insns without
+ using inline assembly; by using these built-in functions the compiler can
+ automatically add workarounds for hardware errata involving these
+ instructions.  These functions are named as follows:
+ 
+ @smallexample
+ void __builtin_bfin_csync (void)
+ void __builtin_bfin_ssync (void)
+ @end smallexample
+ 
  @node FR-V Built-in Functions
  @subsection FR-V Built-in Functions
  
Index: doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.646
diff -c -p -r1.646 invoke.texi
*** doc/invoke.texi	11 Jul 2005 16:11:25 -0000	1.646
--- doc/invoke.texi	12 Jul 2005 10:36:40 -0000
*************** by default.
*** 7415,7427 ****
  Don't generate extra code to prevent speculative loads from occurring.
  
  @item -mcsync-anomaly
! @opindex mspecld-anomaly
  When enabled, the compiler will ensure that the generated code does not
  contain CSYNC or SSYNC instructions too soon after conditional branches.
  This option is enabled by default.
  
  @item -mno-csync-anomaly
! @opindex mno-specld-anomaly
  Don't generate extra code to prevent CSYNC or SSYNC instructions from
  occurring too soon after a conditional branch.
  
--- 7415,7427 ----
  Don't generate extra code to prevent speculative loads from occurring.
  
  @item -mcsync-anomaly
! @opindex mcsync-anomaly
  When enabled, the compiler will ensure that the generated code does not
  contain CSYNC or SSYNC instructions too soon after conditional branches.
  This option is enabled by default.
  
  @item -mno-csync-anomaly
! @opindex mno-csync-anomaly
  Don't generate extra code to prevent CSYNC or SSYNC instructions from
  occurring too soon after a conditional branch.