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[PATCH, committed] Prefer CTR to LR, eq SCC splitter
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 08 Jun 2005 10:49:45 -0400
- Subject: [PATCH, committed] Prefer CTR to LR, eq SCC splitter
The following patch updates the ABI_AIX call patterns similarly to
the earlier ABI_SYSV change to prefer CTR over LR for indirect calls.
The patch also changes the eq SCC pattern to use a splitter that
generates CLZ instead of using the carry bit.
Bootstrapped and regression tested on powerpc-ibm-aix5.2.0.0.
David
* config/rs6000/rs6000.md (call_indirect_nonlocal_aix32): Prefer
CTR to LR.
(call_indirect_nonlocal_aix64): Same.
(call_value_indirect_nonlocal_aix32): Same.
(call_value_indirect_nonlocal_aix64): Same.
PR target/10588
(eq): Use CLZ splitter for compare with zero.
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.375
diff -c -p -r1.375 rs6000.md
*** rs6000.md 6 Jun 2005 02:32:25 -0000 1.375
--- rs6000.md 8 Jun 2005 14:33:43 -0000
***************
*** 10247,10259 ****
;; and < 0 if they were not.
(define_insn "*call_indirect_nonlocal_aix32"
! [(call (mem:SI (match_operand:SI 0 "register_operand" "cl"))
! (match_operand 1 "" "g"))
(use (reg:SI 2))
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (match_scratch:SI 2 "=l"))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
--- 10247,10259 ----
;; and < 0 if they were not.
(define_insn "*call_indirect_nonlocal_aix32"
! [(call (mem:SI (match_operand:SI 0 "register_operand" "c,*l"))
! (match_operand 1 "" "g,g"))
(use (reg:SI 2))
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (match_scratch:SI 2 "=l,l"))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
***************
*** 10272,10284 ****
(set_attr "length" "8")])
(define_insn "*call_indirect_nonlocal_aix64"
! [(call (mem:SI (match_operand:DI 0 "register_operand" "cl"))
! (match_operand 1 "" "g"))
(use (reg:DI 2))
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (match_scratch:SI 2 "=l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
--- 10272,10284 ----
(set_attr "length" "8")])
(define_insn "*call_indirect_nonlocal_aix64"
! [(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l"))
! (match_operand 1 "" "g,g"))
(use (reg:DI 2))
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (match_scratch:SI 2 "=l,l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T0l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
***************
*** 10298,10310 ****
(define_insn "*call_value_indirect_nonlocal_aix32"
[(set (match_operand 0 "" "")
! (call (mem:SI (match_operand:SI 1 "register_operand" "cl"))
! (match_operand 2 "" "g")))
(use (reg:SI 2))
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (match_scratch:SI 3 "=l"))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
--- 10298,10310 ----
(define_insn "*call_value_indirect_nonlocal_aix32"
[(set (match_operand 0 "" "")
! (call (mem:SI (match_operand:SI 1 "register_operand" "c,*l"))
! (match_operand 2 "" "g,g")))
(use (reg:SI 2))
(use (reg:SI 11))
(set (reg:SI 2)
(mem:SI (plus:SI (reg:SI 1) (const_int 20))))
! (clobber (match_scratch:SI 3 "=l,l"))]
"TARGET_32BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;{l|lwz} 2,20(1)"
[(set_attr "type" "jmpreg")
***************
*** 10325,10337 ****
(define_insn "*call_value_indirect_nonlocal_aix64"
[(set (match_operand 0 "" "")
! (call (mem:SI (match_operand:DI 1 "register_operand" "cl"))
! (match_operand 2 "" "g")))
(use (reg:DI 2))
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (match_scratch:SI 3 "=l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
--- 10325,10337 ----
(define_insn "*call_value_indirect_nonlocal_aix64"
[(set (match_operand 0 "" "")
! (call (mem:SI (match_operand:DI 1 "register_operand" "c,*l"))
! (match_operand 2 "" "g,g")))
(use (reg:DI 2))
(use (reg:DI 11))
(set (reg:DI 2)
(mem:DI (plus:DI (reg:DI 1) (const_int 40))))
! (clobber (match_scratch:SI 3 "=l,l"))]
"TARGET_64BIT && DEFAULT_ABI == ABI_AIX"
"b%T1l\;ld 2,40(1)"
[(set_attr "type" "jmpreg")
***************
*** 11472,11482 ****
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
(eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
(match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I")))
! (clobber (match_scratch:SI 3 "=r,&r,r,r,r"))]
"TARGET_32BIT"
"@
xor %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
! {sfi|subfic} %3,%1,0\;{ae|adde} %0,%3,%1
{xoril|xori} %0,%1,%b2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
{xoriu|xoris} %0,%1,%u2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
{sfi|subfic} %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0"
--- 11472,11482 ----
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
(eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
(match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I")))
! (clobber (match_scratch:SI 3 "=r,X,r,r,r"))]
"TARGET_32BIT"
"@
xor %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
! #
{xoril|xori} %0,%1,%b2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
{xoriu|xoris} %0,%1,%u2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0
{sfi|subfic} %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae|adde} %0,%3,%0"
***************
*** 11487,11503 ****
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r")
(eq:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r,r")
(match_operand:DI 2 "reg_or_cint_operand" "r,O,K,J,I")))
! (clobber (match_scratch:DI 3 "=r,&r,r,r,r"))]
"TARGET_64BIT"
"@
xor %0,%1,%2\;subfic %3,%0,0\;adde %0,%3,%0
! subfic %3,%1,0\;adde %0,%3,%1
xori %0,%1,%b2\;subfic %3,%0,0\;adde %0,%3,%0
xoris %0,%1,%u2\;subfic %3,%0,0\;adde %0,%3,%0
subfic %0,%1,%2\;subfic %3,%0,0\;adde %0,%3,%0"
[(set_attr "type" "three,two,three,three,three")
(set_attr "length" "12,8,12,12,12")])
(define_insn ""
[(set (match_operand:CC 4 "cc_reg_operand" "=x,x,x,x,x,?y,?y,?y,?y,?y")
(compare:CC
--- 11487,11517 ----
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r")
(eq:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r,r,r,r")
(match_operand:DI 2 "reg_or_cint_operand" "r,O,K,J,I")))
! (clobber (match_scratch:DI 3 "=r,X,r,r,r"))]
"TARGET_64BIT"
"@
xor %0,%1,%2\;subfic %3,%0,0\;adde %0,%3,%0
! #
xori %0,%1,%b2\;subfic %3,%0,0\;adde %0,%3,%0
xoris %0,%1,%u2\;subfic %3,%0,0\;adde %0,%3,%0
subfic %0,%1,%2\;subfic %3,%0,0\;adde %0,%3,%0"
[(set_attr "type" "three,two,three,three,three")
(set_attr "length" "12,8,12,12,12")])
+ (define_split
+ [(set (match_operand:GPR 0 "gpc_reg_operand" "")
+ (eq:GPR (match_operand:GPR 1 "gpc_reg_operand" "")
+ (match_operand:GPR 2 "zero_constant" "")))
+ (clobber (match_scratch:GPR 3 ""))]
+ ""
+ [(set (match_dup 0)
+ (clz:GPR (match_dup 1)))
+ (set (match_dup 0)
+ (lshiftrt:GPR (match_dup 0) (match_dup 4)))]
+ {
+ operands[4] = GEN_INT (exact_log2 (GET_MODE_BITSIZE (<MODE>mode)));
+ })
+
(define_insn ""
[(set (match_operand:CC 4 "cc_reg_operand" "=x,x,x,x,x,?y,?y,?y,?y,?y")
(compare:CC
***************
*** 11506,11516 ****
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r,r,r")
(eq:SI (match_dup 1) (match_dup 2)))
! (clobber (match_scratch:SI 3 "=r,&r,r,r,r,r,&r,r,r,r"))]
"TARGET_32BIT"
"@
xor %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
! {sfi|subfic} %3,%1,0\;{ae.|adde.} %0,%3,%1
{xoril|xori} %0,%1,%b2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
{xoriu|xoris} %0,%1,%u2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
{sfi|subfic} %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
--- 11520,11530 ----
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r,r,r")
(eq:SI (match_dup 1) (match_dup 2)))
! (clobber (match_scratch:SI 3 "=r,X,r,r,r,r,X,r,r,r"))]
"TARGET_32BIT"
"@
xor %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
! #
{xoril|xori} %0,%1,%b2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
{xoriu|xoris} %0,%1,%u2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
{sfi|subfic} %0,%1,%2\;{sfi|subfic} %3,%0,0\;{ae.|adde.} %0,%3,%0
***************
*** 11548,11558 ****
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r,r,r")
(eq:DI (match_dup 1) (match_dup 2)))
! (clobber (match_scratch:DI 3 "=r,&r,r,r,r,r,&r,r,r,r"))]
"TARGET_64BIT"
"@
xor %0,%1,%2\;subfic %3,%0,0\;adde. %0,%3,%0
! subfic %3,%1,0\;adde. %0,%3,%1
xori %0,%1,%b2\;subfic %3,%0,0\;adde. %0,%3,%0
xoris %0,%1,%u2\;subfic %3,%0,0\;adde. %0,%3,%0
subfic %0,%1,%2\;subfic %3,%0,0\;adde. %0,%3,%0
--- 11562,11572 ----
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r,r,r")
(eq:DI (match_dup 1) (match_dup 2)))
! (clobber (match_scratch:DI 3 "=r,X,r,r,r,r,X,r,r,r"))]
"TARGET_64BIT"
"@
xor %0,%1,%2\;subfic %3,%0,0\;adde. %0,%3,%0
! #
xori %0,%1,%b2\;subfic %3,%0,0\;adde. %0,%3,%0
xoris %0,%1,%u2\;subfic %3,%0,0\;adde. %0,%3,%0
subfic %0,%1,%2\;subfic %3,%0,0\;adde. %0,%3,%0
***************
*** 11582,11587 ****
--- 11596,11622 ----
(const_int 0)))]
"")
+ (define_split
+ [(set (match_operand:CC 4 "cc_reg_operand" "")
+ (compare:CC
+ (eq:GPR (match_operand:GPR 1 "gpc_reg_operand" "")
+ (match_operand:GPR 2 "zero_constant" ""))
+ (const_int 0)))
+ (set (match_operand:GPR 0 "gpc_reg_operand" "")
+ (eq:GPR (match_dup 1) (match_dup 2)))
+ (clobber (match_scratch:GPR 3 ""))]
+ ""
+ [(set (match_dup 0)
+ (clz:GPR (match_dup 1)))
+ (parallel [(set (match_dup 4)
+ (compare:CC (lshiftrt:GPR (match_dup 0) (match_dup 5))
+ (const_int 0)))
+ (set (match_dup 0)
+ (lshiftrt:GPR (match_dup 0) (match_dup 5)))])]
+ {
+ operands[5] = GEN_INT (exact_log2 (GET_MODE_BITSIZE (<MODE>mode)));
+ })
+
;; We have insns of the form shown by the first define_insn below. If
;; there is something inside the comparison operation, we must split it.
(define_split