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Re: [rfc] multi-word subreg lowering pass
- From: Richard Henderson <rth at redhat dot com>
- To: Paul Schlie <schlie at comcast dot net>
- Cc: Björn Haase <bjoern dot m dot haase at web dot de>, gcc-patches at gcc dot gnu dot org
- Date: Sat, 7 May 2005 15:42:14 -0700
- Subject: Re: [rfc] multi-word subreg lowering pass
- References: <BEA2431C.A136%schlie@comcast.net>
On Sat, May 07, 2005 at 10:04:12AM -0400, Paul Schlie wrote:
> - For a byte word size target like AVR for which UNITS_PER_WORD == 1,
> would all operations be decomposed to QI mode operations?
Yes.
> - What effect if any would it's presently necessary lie about it's
> word size (i.e. lies within libgcc2 and claims UNITS_PER_WORD == 4
> in order to trick it into selecting reasonably correct operand modes)
> have on the generated code for functions defined within libgcc2?
No idea.
> - Out of curiosity, why not leave all decomposed operations in their
> subreg form, thereby maintaining the logical integrity of their operand
> modes? i.e. the above decomposes to something like:
>
> (set (subreg:SI 100 0) (and:SI (reg:SI x) (subreg:SI y 0)))
> (set (subreg:SI 100 1) (and:SI (const_int 0) (subreg:SI y 1)))
>
> which seems both simpler, and does not require introduction of new
> semantics which complicate multi-word/sub-reg input operand expressions.
The Object is to present the register allocator with something that
it has more freedom to work with. This doesn't achieve that goal.
r~