Re: [PATCH] Generic vectors 3/3

[Paolo Bonzini <paolo dot bonzini at lu dot unisi dot ch>]

> It might be worthwile to prepare a documentation patch and/or comments
> explaining what "generic vectorization" is (especially compared to autovect). I
> have no clue, for instance. passes.texi is the right place IIRC.
>  
I will add it to changes.html; basically, it means that the vectorizer 
can vectorize loops even if no SIMD hardware is there:

 char sa[1000], sb[1000];
 for (i = 0; i < 1000; i++)
   sa[i] = sa[i] ^ 2;

You can do this by ints, xoring 0x02020202.  And even for this,

 for (i = 0; i < 1000; i++)
   sa[i] = sa[i] + 0x82;

you can lower it to

 for (i = 0; i < 1000; i += 4)
   {
     int *p = (int *) &sa[i];
     p = ((p & 0x7f7f7f7f) + 0x02020202) ^ (p & 0x80808080) ^ 0x80808080;
   }

which means, use a full-adder for the bottom 7 bits, and a half adder 
for the topmost bit.

Support for these lowerings is already in GCC 4.0; my patches enable the 
vectorizer to take advantage of them.

With a follow-up patch, GCC will use these lowerings even if SIMD 
hardware is there, if a particular operation is not supported.  For 
example, Alpha only supports MIN/MAX on vectors: adds must be lowered, 
while bitwise operations do not need separate instructions because there 
are no separate vector registers (you can use standard 64-bit AND, OR 
and XOR statements).

Paolo