This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Patch to skip some more tests for x86 -m64


Here is a revised patch using dg-require-effective-target.  Tested on 
i386-pc-solaris2.10.1.  OK to commit to mainline and 4.0 branch?

-- 
Joseph S. Myers               http://www.srcf.ucam.org/~jsm28/gcc/
    jsm@polyomino.org.uk (personal mail)
    joseph@codesourcery.com (CodeSourcery mail)
    jsm28@gcc.gnu.org (Bugzilla assignments and CCs)

2005-04-06  Joseph S. Myers  <joseph@codesourcery.com>

	* gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c,
	gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for
	-m64.
	* gcc.dg/loop-3.c, gcc.dg/short-compare-1.c,
	gcc.dg/short-compare-2.c, gcc.dg/smod-1.c,
	gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64.

diff -rupN GCC.orig/gcc/testsuite/gcc.dg/i386-387-7.c GCC/gcc/testsuite/gcc.dg/i386-387-7.c
--- GCC.orig/gcc/testsuite/gcc.dg/i386-387-7.c	2004-08-03 08:19:04.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/i386-387-7.c	2005-04-05 18:57:36.000000000 +0000
@@ -1,5 +1,6 @@
 /* Verify that 387 fsincos instruction is generated.  */
 /* { dg-do compile { target "i?86-*-*" } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O -ffast-math -march=i686" } */
 /* { dg-final { scan-assembler "fsincos" } } */
 
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/i386-3dnowA-1.c GCC/gcc/testsuite/gcc.dg/i386-3dnowA-1.c
--- GCC.orig/gcc/testsuite/gcc.dg/i386-3dnowA-1.c	2004-07-10 00:27:59.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/i386-3dnowA-1.c	2005-04-05 18:57:54.000000000 +0000
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target i?86-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O2 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
 
 /* Test that the intrinsics compile with optimization.  All of them are
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/i386-3dnowA-2.c GCC/gcc/testsuite/gcc.dg/i386-3dnowA-2.c
--- GCC.orig/gcc/testsuite/gcc.dg/i386-3dnowA-2.c	2004-07-10 00:27:59.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/i386-3dnowA-2.c	2005-04-05 18:58:36.000000000 +0000
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target i?86-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
 
 /* Test that the intrinsics compile without optimization.  All of them are
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/loop-3.c GCC/gcc/testsuite/gcc.dg/loop-3.c
--- GCC.orig/gcc/testsuite/gcc.dg/loop-3.c	2004-12-15 16:19:42.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/loop-3.c	2005-04-01 23:43:36.000000000 +0000
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-options "-O3" } */
-/* { dg-options "-O3 -mtune=i386" { target i?86-*-* } } */
+/* { dg-options "-O3 -mtune=i386" { target { i?86-*-* && ilp32 } } } */
 
 #if defined(STACK_SIZE) && (STACK_SIZE < 65536)
 # define BYTEMEM_SIZE 10000L
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/pr12092-1.c GCC/gcc/testsuite/gcc.dg/pr12092-1.c
--- GCC.orig/gcc/testsuite/gcc.dg/pr12092-1.c	2005-01-03 03:33:58.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/pr12092-1.c	2005-04-05 18:58:44.000000000 +0000
@@ -1,6 +1,7 @@
 /* PR rtl-optimization/12092  */
 /* Test case reduced by Andrew Pinski <pinskia@physics.uc.edu> */
 /* { dg-do compile { target i?86-*-* } } */
+/* { dg-require-effective-target ilp32 } */
 /* { dg-options "-O2 -mtune=i486 -march=pentium4 -fprefetch-loop-arrays" } */
 
 void DecodeAC(int index,int *matrix)
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/short-compare-1.c GCC/gcc/testsuite/gcc.dg/short-compare-1.c
--- GCC.orig/gcc/testsuite/gcc.dg/short-compare-1.c	2005-01-18 08:26:21.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/short-compare-1.c	2005-04-01 23:43:45.000000000 +0000
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
+/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
 /* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
 
 extern void abort(void);
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/short-compare-2.c GCC/gcc/testsuite/gcc.dg/short-compare-2.c
--- GCC.orig/gcc/testsuite/gcc.dg/short-compare-2.c	2005-01-18 08:26:21.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/short-compare-2.c	2005-04-01 23:43:56.000000000 +0000
@@ -4,7 +4,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
+/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
 /* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
 
 extern void abort();
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/smod-1.c GCC/gcc/testsuite/gcc.dg/smod-1.c
--- GCC.orig/gcc/testsuite/gcc.dg/smod-1.c	2004-10-20 10:21:40.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/smod-1.c	2005-04-01 23:44:06.000000000 +0000
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-std=c99" } */
-/* { dg-options "-std=c99 -mtune=i486" { target i?86-*-* } } */
+/* { dg-options "-std=c99 -mtune=i486" { target { i?86-*-* && ilp32 } } } */
 
 #include <limits.h>
 
diff -rupN GCC.orig/gcc/testsuite/gcc.dg/torture/badshift.c GCC/gcc/testsuite/gcc.dg/torture/badshift.c
--- GCC.orig/gcc/testsuite/gcc.dg/torture/badshift.c	2005-03-24 10:52:38.000000000 +0000
+++ GCC/gcc/testsuite/gcc.dg/torture/badshift.c	2005-04-01 23:44:15.000000000 +0000
@@ -2,7 +2,7 @@
 
 /* { dg-do run } */
 /* { dg-options "" } */
-/* { dg-options "-march=i386" { target i?86-*-* } } */
+/* { dg-options "-march=i386" { target { i?86-*-* && ilp32 } } } */
 
 /* We used to optimize the DImode shift-by-32 to zero because in combine
    we turned:


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]