[arm] Dwarf register numbers

[Paul Brook <paul at codesourcery dot com>]

The attached patch makes gcc use the dwarf register numbers defined by the Arm 
EABI for coprocessor registers.

The eabi changes the numbers for FPA registers. I've made eabi based targets 
use the new numbering, and left other targets using the old values. Users 
will need a new gdb to debug eabi binaries anyway.

The patch also changes the dwarf register numbering for iWMMXt registers. Is 
there anything we care about that uses the current numbering? I expect the 
same logic applies as for FPA.

The current iWMMXt numbering lies within a "reserved" range under the eabi, so 
we could add a commandline option if there are people that need the old 
numbering.

Tested on arm-none-eabi and arm-none-elf, with spot checks to confirm the 
output for legacy FPA code is unchanged.

Ok?

Paul

2005-03-26  Paul Brook  <paul@codesourcery.com>

 * config/arm/arm-protos.h (arm_dbx_register_number): Add prototype.
 * config/arm/arm.c (arm_dbx_register_number): New function.
 * config/arm/arm.h (IS_FPA_REGNUM, DBX_REGISTER_NUMBER): Define.

Index: gcc/config/arm/arm-protos.h
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm-protos.h,v
retrieving revision 1.82
diff -u -p -r1.82 arm-protos.h
--- gcc/config/arm/arm-protos.h	16 Feb 2005 21:57:06 -0000	1.82
+++ gcc/config/arm/arm-protos.h	26 Mar 2005 03:42:04 -0000
@@ -38,6 +38,7 @@ extern HOST_WIDE_INT arm_compute_initial
 							     unsigned int);
 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
 							       unsigned int);
+extern unsigned int arm_dbx_register_number (unsigned int);
 
 #ifdef TREE_CODE
 extern int arm_return_in_memory (tree);
Index: gcc/config/arm/arm.c
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.431
diff -u -p -r1.431 arm.c
--- gcc/config/arm/arm.c	1 Mar 2005 10:22:53 -0000	1.431
+++ gcc/config/arm/arm.c	26 Mar 2005 03:28:27 -0000
@@ -14641,3 +14641,30 @@ arm_shift_truncation_mask (enum machine_
 {
   return mode == SImode ? 255 : 0;
 }
+
+
+/* Map internal gcc register numbers to DWARF2 register numbers.  */
+
+unsigned int
+arm_dbx_register_number (unsigned int regno)
+{
+  if (regno < 16)
+    return regno;
+
+  /* TODO: Legacy targets output FPA regs as registers 16-23 for backwards
+     compatibility.  The EABI defines them as registers 96-103.  */
+  if (IS_FPA_REGNUM (regno))
+    return (TARGET_AAPCS_BASED ? 96 : 16) + regno - FIRST_FPA_REGNUM;
+
+  if (IS_VFP_REGNUM (regno))
+    return 64 + regno - FIRST_VFP_REGNUM;
+
+  if (IS_IWMMXT_GR_REGNUM (regno))
+    return 104 + regno - FIRST_IWMMXT_GR_REGNUM;
+
+  if (IS_IWMMXT_REGNUM (regno))
+    return 112 + regno - FIRST_IWMMXT_REGNUM;
+
+  abort ();
+}
+
Index: gcc/config/arm/arm.h
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm.h,v
retrieving revision 1.268
diff -u -p -r1.268 arm.h
--- gcc/config/arm/arm.h	15 Mar 2005 17:45:55 -0000	1.268
+++ gcc/config/arm/arm.h	26 Mar 2005 03:28:27 -0000
@@ -1032,6 +1032,8 @@ extern const char * structure_size_strin
 /* ARM floating pointer registers.  */
 #define FIRST_FPA_REGNUM 	16
 #define LAST_FPA_REGNUM  	23
+#define IS_FPA_REGNUM(REGNUM) \
+  (((REGNUM) >= FIRST_FPA_REGNUM) && ((REGNUM) <= LAST_FPA_REGNUM))
 
 #define FIRST_IWMMXT_GR_REGNUM	43
 #define LAST_IWMMXT_GR_REGNUM	46
@@ -1064,6 +1066,8 @@ extern const char * structure_size_strin
 /* VFP adds 32 + 1 more.  */
 #define FIRST_PSEUDO_REGISTER   96
 
+#define DBX_REGISTER_NUMBER(REGNO) arm_dbx_register_number (REGNO)
+
 /* Value should be nonzero if functions must have frame pointers.
    Zero means the frame pointer need not be set up (and parms may be accessed
    via the stack pointer) in functions that seem suitable.