[PATCH] Further signbit/copysign improvements (part 2/2)

[Roger Sayle <roger at eyesopen dot com>]

This patch is the second half of the refinements to my signbitl
patch proposed by Richard Henderson.  The recent middle-end improvements
allow expand_builtin_copysign to synthesize an inline intrinsic version
for Darwin's long doubles, so we no longer need rs6000.md's pattern for
copysigntf3.  As a result, the helper function expand_copysign_absneg
no longer needs to be used outside of optabs.c and can be made static.

The following patch has been tested on powerpc-apple-darwin8.0.0, all
default languages, and powerpc-apple-darwin7.8.0, c and objc, with a
full "make bootstrap", and regression tested with a top-level "make -k
check" with no new failures.

Ok for mainline?


2005-03-16  Roger Sayle  <roger@eyesopen.com>

	* optabs.c (expand_copysign_absneg): Make static.
	* optabs.h (expand_copysign_absneg): Delete prototype.
	* config/rs6000/rs6000.md (copysigntf3): Delete pattern.


Index: optabs.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.c,v
retrieving revision 1.264
diff -c -3 -p -r1.264 optabs.c
*** optabs.c	15 Mar 2005 23:30:23 -0000	1.264
--- optabs.c	16 Mar 2005 05:32:30 -0000
*************** expand_abs (enum machine_mode mode, rtx
*** 2678,2684 ****
     is that we have a split register file, and leaving op0 in fp registers,
     and not playing with subregs so much, will help the register allocator.  */

! rtx
  expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
  		        int bitpos, bool op0_is_abs)
  {
--- 2678,2684 ----
     is that we have a split register file, and leaving op0 in fp registers,
     and not playing with subregs so much, will help the register allocator.  */

! static rtx
  expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target,
  		        int bitpos, bool op0_is_abs)
  {
Index: optabs.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.h,v
retrieving revision 1.49
diff -c -3 -p -r1.49 optabs.h
*** optabs.h	12 Feb 2005 11:34:21 -0000	1.49
--- optabs.h	16 Mar 2005 05:32:30 -0000
*************** extern rtx expand_abs (enum machine_mode
*** 463,469 ****

  /* Expand the copysign operation.  */
  extern rtx expand_copysign (rtx, rtx, rtx);
- extern rtx expand_copysign_absneg (enum machine_mode, rtx, rtx, rtx, int, bool);

  /* Generate an instruction with a given INSN_CODE with an output and
     an input.  */
--- 463,468 ----
Index: config/rs6000/rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.354
diff -c -3 -p -r1.354 rs6000.md
*** config/rs6000/rs6000.md	13 Mar 2005 20:28:29 -0000	1.354
--- config/rs6000/rs6000.md	16 Mar 2005 05:32:33 -0000
***************
*** 8492,8524 ****
    operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
    operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
  }")
-
- (define_expand "copysigntf3"
-   [(match_operand:TF 0 "general_operand" "")
-    (match_operand:TF 1 "general_operand" "")
-    (match_operand:TF 2 "general_operand" "")]
-   "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
-    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
- {
-   rtx target, op0, op1, temp;
-   bool op0_is_abs = false;
-
-   target = operands[0];
-   op0 = operands[1];
-   op1 = operands[2];
-
-   if (GET_CODE (op0) == CONST_DOUBLE)
-     {
-       if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0)))
- 	op0 = simplify_unary_operation (ABS, TFmode, op0, TFmode);
-       op0_is_abs = true;
-     }
-
-   temp = expand_copysign_absneg (TFmode, op0, op1, target, 127, op0_is_abs);
-   if (temp != target)
-     emit_move_insn (target, temp);
-   DONE;
- })

  ;; Next come the multi-word integer load and store and the load and store
  ;; multiple insns.
--- 8492,8497 ----


Roger
--