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[RFA:] Change TARGET_MD_ASM_CLOBBERS to take output and input lists as well.
- From: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sun, 27 Feb 2005 17:28:00 +0100
- Subject: [RFA:] Change TARGET_MD_ASM_CLOBBERS to take output and input lists as well.
As described in
<URL:http://gcc.gnu.org/ml/gcc-patches/2005-02/msg00860.html>.
Bootstrapped and tested on i686-pc-linux-gnu, made dvi.
A casual observer might oppose to adding the lists as the
*first* parameters in the call, but I chose this order because
(outputs, inputs, clobbers) is the order in an asm apperaring in
source code.
Ok to commit?
* doc/tm.texi (TARGET_MD_ASM_CLOBBERS): Adjust wording to not
imply that this is called once, independent of asms in code.
Adjust to now being pased output and input lists. Mention helper
function decl_overlaps_hard_reg_set_p.
* hooks.c (hook_tree_tree_tree_tree_3rd_identity): Rename from
hook_tree_tree_identity and to take three trees, returning third.
* hooks.h (hook_tree_tree_tree_tree_3rd_identity): Adjust the
prototype.
* stmt.c: include hard-reg-set.h before tree.h.
(decl_overlaps_hard_reg_set_p): New function, broken out from...
(decl_conflicts_with_clobbers_p): Call
decl_overlaps_hard_reg_set_p.
(expand_asm_operands): Pass output and input lists in call to
targetm.md_asm_clobbers.
* target-def.h (TARGET_MD_ASM_CLOBBERS): Define as
hook_tree_tree_tree_tree_3rd_identity.
* target.h (struct gcc_target.md_asm_clobbers): Take three tree
parameters.
* tree.h [HARD_CONST] (decl_overlaps_hard_reg_set_p): Prototype.
* config/i386/i386.c (ix86_md_asm_clobbers): Adjust to three
parameters, first two unused.
Index: gcc/hooks.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/hooks.c,v
retrieving revision 1.36
diff -c -p -r1.36 hooks.c
*** gcc/hooks.c 7 Oct 2004 04:00:55 -0000 1.36
--- gcc/hooks.c 27 Feb 2005 15:36:06 -0000
*************** hook_rtx_tree_int_null (tree a ATTRIBUTE
*** 220,230 ****
return NULL;
}
! /* Generic hook that takes a tree and returns it as is. */
tree
! hook_tree_tree_identity (tree a)
{
! return a;
}
/* Generic hook that takes a tree and returns a NULL string. */
--- 220,231 ----
return NULL;
}
! /* Generic hook that takes three trees and returns the last one as is. */
tree
! hook_tree_tree_tree_tree_3rd_identity (tree a ATTRIBUTE_UNUSED,
! tree b ATTRIBUTE_UNUSED, tree c)
{
! return c;
}
/* Generic hook that takes a tree and returns a NULL string. */
Index: gcc/hooks.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/hooks.h,v
retrieving revision 1.36
diff -c -p -r1.36 hooks.h
*** gcc/hooks.h 7 Oct 2004 04:00:55 -0000 1.36
--- gcc/hooks.h 27 Feb 2005 15:36:06 -0000
*************** extern bool hook_bool_tree_tree_false (t
*** 61,67 ****
extern rtx hook_rtx_rtx_identity (rtx);
extern rtx hook_rtx_rtx_null (rtx);
extern rtx hook_rtx_tree_int_null (tree, int);
! extern tree hook_tree_tree_identity (tree a);
extern const char *hook_constcharptr_tree_null (tree);
extern tree hook_tree_tree_bool_null (tree, bool);
#endif
--- 61,67 ----
extern rtx hook_rtx_rtx_identity (rtx);
extern rtx hook_rtx_rtx_null (rtx);
extern rtx hook_rtx_tree_int_null (tree, int);
! extern tree hook_tree_tree_tree_tree_3rd_identity (tree, tree, tree);
extern const char *hook_constcharptr_tree_null (tree);
extern tree hook_tree_tree_bool_null (tree, bool);
#endif
Index: gcc/stmt.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/stmt.c,v
retrieving revision 1.416
diff -c -p -r1.416 stmt.c
*** gcc/stmt.c 18 Feb 2005 12:20:27 -0000 1.416
--- gcc/stmt.c 27 Feb 2005 15:36:06 -0000
*************** Software Foundation, 59 Temple Place - S
*** 31,36 ****
--- 31,37 ----
#include "tm.h"
#include "rtl.h"
+ #include "hard-reg-set.h"
#include "tree.h"
#include "tm_p.h"
#include "flags.h"
*************** Software Foundation, 59 Temple Place - S
*** 39,45 ****
#include "insn-config.h"
#include "expr.h"
#include "libfuncs.h"
- #include "hard-reg-set.h"
#include "recog.h"
#include "machmode.h"
#include "toplev.h"
--- 40,45 ----
*************** parse_input_constraint (const char **con
*** 558,572 ****
return true;
}
! /* Check for overlap between registers marked in CLOBBERED_REGS and
! anything inappropriate in DECL. Emit error and return TRUE for error,
! FALSE for ok. */
! static bool
! decl_conflicts_with_clobbers_p (tree decl, const HARD_REG_SET clobbered_regs)
{
- /* Conflicts between asm-declared register variables and the clobber
- list are not allowed. */
if ((TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == PARM_DECL)
&& DECL_REGISTER (decl)
&& REG_P (DECL_RTL (decl))
--- 558,569 ----
return true;
}
! /* Return true iff there's an overlap between REGS and DECL, where DECL
! can be an asm-declared register. */
! bool
! decl_overlaps_hard_reg_set_p (tree decl, const HARD_REG_SET regs)
{
if ((TREE_CODE (decl) == VAR_DECL || TREE_CODE (decl) == PARM_DECL)
&& DECL_REGISTER (decl)
&& REG_P (DECL_RTL (decl))
*************** decl_conflicts_with_clobbers_p (tree dec
*** 579,596 ****
regno < (REGNO (reg)
+ hard_regno_nregs[REGNO (reg)][GET_MODE (reg)]);
regno++)
! if (TEST_HARD_REG_BIT (clobbered_regs, regno))
! {
! error ("asm-specifier for variable %qs conflicts with "
! "asm clobber list",
! IDENTIFIER_POINTER (DECL_NAME (decl)));
!
! /* Reset registerness to stop multiple errors emitted for a
! single variable. */
! DECL_REGISTER (decl) = 0;
! return true;
! }
}
return false;
}
--- 576,609 ----
regno < (REGNO (reg)
+ hard_regno_nregs[REGNO (reg)][GET_MODE (reg)]);
regno++)
! if (TEST_HARD_REG_BIT (regs, regno))
! return true;
! }
!
! return false;
! }
!
!
! /* Check for overlap between registers marked in CLOBBERED_REGS and
! anything inappropriate in DECL. Emit error and return TRUE for error,
! FALSE for ok. */
!
! static bool
! decl_conflicts_with_clobbers_p (tree decl, const HARD_REG_SET clobbered_regs)
! {
! /* Conflicts between asm-declared register variables and the clobber
! list are not allowed. */
! if (decl_overlaps_hard_reg_set_p (decl, clobbered_regs))
! {
! error ("asm-specifier for variable %qs conflicts with asm clobber list",
! IDENTIFIER_POINTER (DECL_NAME (decl)));
!
! /* Reset registerness to stop multiple errors emitted for a single
! variable. */
! DECL_REGISTER (decl) = 0;
! return true;
}
+
return false;
}
*************** expand_asm_operands (tree string, tree o
*** 656,662 ****
Case in point is when the i386 backend moved from cc0 to a hard reg --
maintaining source-level compatibility means automatically clobbering
the flags register. */
! clobbers = targetm.md_asm_clobbers (clobbers);
/* Count the number of meaningful clobbered registers, ignoring what
we would ignore later. */
--- 669,675 ----
Case in point is when the i386 backend moved from cc0 to a hard reg --
maintaining source-level compatibility means automatically clobbering
the flags register. */
! clobbers = targetm.md_asm_clobbers (outputs, inputs, clobbers);
/* Count the number of meaningful clobbered registers, ignoring what
we would ignore later. */
Index: gcc/target-def.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/target-def.h,v
retrieving revision 1.112
diff -c -p -r1.112 target-def.h
*** gcc/target-def.h 30 Dec 2004 03:07:37 -0000 1.112
--- gcc/target-def.h 27 Feb 2005 15:36:06 -0000
*************** Foundation, 59 Temple Place - Suite 330,
*** 371,377 ****
#define TARGET_BUILTIN_SETJMP_FRAME_VALUE default_builtin_setjmp_frame_value
! #define TARGET_MD_ASM_CLOBBERS hook_tree_tree_identity
#define TARGET_DWARF_CALLING_CONVENTION hook_int_tree_0
--- 371,377 ----
#define TARGET_BUILTIN_SETJMP_FRAME_VALUE default_builtin_setjmp_frame_value
! #define TARGET_MD_ASM_CLOBBERS hook_tree_tree_tree_tree_3rd_identity
#define TARGET_DWARF_CALLING_CONVENTION hook_int_tree_0
Index: gcc/target.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/target.h,v
retrieving revision 1.124
diff -c -p -r1.124 target.h
*** gcc/target.h 30 Dec 2004 03:07:37 -0000 1.124
--- gcc/target.h 27 Feb 2005 15:36:07 -0000
*************** struct gcc_target
*** 477,484 ****
rtx (* builtin_setjmp_frame_value) (void);
/* This target hook should add STRING_CST trees for any hard regs
! the port wishes to automatically clobber for all asms. */
! tree (* md_asm_clobbers) (tree);
/* This target hook allows the backend to specify a calling convention
in the debug information. This function actually returns an
--- 477,484 ----
rtx (* builtin_setjmp_frame_value) (void);
/* This target hook should add STRING_CST trees for any hard regs
! the port wishes to automatically clobber for an asm. */
! tree (* md_asm_clobbers) (tree, tree, tree);
/* This target hook allows the backend to specify a calling convention
in the debug information. This function actually returns an
Index: gcc/tree.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/tree.h,v
retrieving revision 1.692
diff -c -p -r1.692 tree.h
*** gcc/tree.h 14 Feb 2005 16:07:16 -0000 1.692
--- gcc/tree.h 27 Feb 2005 15:36:09 -0000
*************** extern tree resolve_asm_operand_names (t
*** 3744,3749 ****
--- 3744,3753 ----
extern void expand_case (tree);
extern void expand_decl (tree);
extern void expand_anon_union_decl (tree, tree, tree);
+ #ifdef HARD_CONST
+ /* Silly ifdef to avoid having all includers depend on hard-reg-set.h. */
+ extern bool decl_overlaps_hard_reg_set_p (tree, const HARD_REG_SET);
+ #endif
/* In gimplify.c. */
extern tree create_artificial_label (void);
Index: gcc/config/cris/cris.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.c,v
retrieving revision 1.66
diff -c -p -r1.66 cris.c
*** gcc/config/cris/cris.c 24 Feb 2005 22:17:42 -0000 1.66
--- gcc/config/cris/cris.c 27 Feb 2005 15:36:10 -0000
*************** static bool cris_pass_by_reference (CUMU
*** 125,130 ****
--- 125,131 ----
tree, bool);
static int cris_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
tree, bool);
+ static tree cris_md_asm_clobbers (tree, tree, tree);
/* The function cris_target_asm_function_epilogue puts the last insn to
output here. It always fits; there won't be a symbol operand. Used in
*************** int cris_cpu_version = CRIS_DEFAULT_CPU_
*** 201,206 ****
--- 202,209 ----
#define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
#undef TARGET_ARG_PARTIAL_BYTES
#define TARGET_ARG_PARTIAL_BYTES cris_arg_partial_bytes
+ #undef TARGET_MD_ASM_CLOBBERS
+ #define TARGET_MD_ASM_CLOBBERS cris_md_asm_clobbers
struct gcc_target targetm = TARGET_INITIALIZER;
*************** cris_conditional_register_usage (void)
*** 484,489 ****
--- 487,495 ----
if (flag_pic)
fixed_regs[PIC_OFFSET_TABLE_REGNUM]
= call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
+
+ if (TARGET_HAS_MUL_INSNS)
+ fixed_regs[CRIS_MOF_REGNUM] = 0;
}
/* Return current_function_uses_pic_offset_table. For use in cris.md,
*************** cris_print_operand (FILE *file, rtx x, i
*** 1546,1551 ****
--- 1552,1567 ----
fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
return;
+ case 'd':
+ /* If this is a GOT symbol, print it as :GOT regardless of -fpic. */
+ if (flag_pic && CONSTANT_P (operand) && cris_got_symbol (operand))
+ {
+ cris_output_addr_const (file, operand);
+ fprintf (file, ":GOT");
+ return;
+ }
+ break;
+
case 'D':
/* When emitting an sub for the high part of a DImode constant, we
want to use subq for 0 and subs.w for -1. */
*************** cris_print_operand (FILE *file, rtx x, i
*** 1580,1586 ****
switch (GET_CODE (operand))
{
case REG:
! if (REGNO (operand) > 15)
internal_error ("internal error: bad register: %d", REGNO (operand));
fprintf (file, "$%s", reg_names[REGNO (operand)]);
return;
--- 1596,1604 ----
switch (GET_CODE (operand))
{
case REG:
! if (REGNO (operand) > 15
! && REGNO (operand) != CRIS_MOF_REGNUM
! && REGNO (operand) != CRIS_SRP_REGNUM)
internal_error ("internal error: bad register: %d", REGNO (operand));
fprintf (file, "$%s", reg_names[REGNO (operand)]);
return;
*************** cris_arg_partial_bytes (CUMULATIVE_ARGS
*** 3131,3136 ****
--- 3149,3228 ----
return 0;
}
+ static tree
+ cris_md_asm_clobbers (tree outputs, tree inputs, tree clobbers)
+ {
+ HARD_REG_SET mof_set;
+ tree t;
+
+ CLEAR_HARD_REG_SET (mof_set);
+ SET_HARD_REG_BIT (mof_set, CRIS_MOF_REGNUM);
+
+ for (t = outputs; t != NULL; t = TREE_CHAIN (t))
+ {
+ tree val = TREE_VALUE (t);
+
+ /* The constraint letter for the singleton register class of MOF
+ is 'h'. If it's mentioned in the constraints, the asm is
+ MOF-aware and adding it to the clobbers would cause it to have
+ impossible constraints. */
+ if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
+ 'h') != NULL
+ || decl_overlaps_hard_reg_set_p (val, mof_set))
+ return clobbers;
+ }
+
+ for (t = inputs; t != NULL; t = TREE_CHAIN (t))
+ {
+ tree val = TREE_VALUE (t);
+
+ if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
+ 'h') != NULL
+ || decl_overlaps_hard_reg_set_p (val, mof_set))
+ return clobbers;
+ }
+
+ return tree_cons (NULL_TREE,
+ build_string (strlen (reg_names[CRIS_MOF_REGNUM]),
+ reg_names[CRIS_MOF_REGNUM]),
+ clobbers);
+ }
+
+ #if 0
+ /* { dg-do compile } */
+ unsigned int
+ in (unsigned int i)
+ {
+ register int i0 asm ("mof") = i;
+ asm ("in-asm: %0" : : "x" (i0));
+ }
+
+ unsigned int
+ out (void)
+ {
+ register int o asm ("mof");
+ asm ("out-asm: %0" : "=x" (o));
+ return o;
+ }
+
+ unsigned int
+ in2 (unsigned int i)
+ {
+ asm ("in2-asm: %0" : : "h" (i));
+ }
+
+ unsigned int
+ out2 (void)
+ {
+ unsigned int o;
+ asm ("out2-asm: %0" : "=h" (o));
+ return o;
+ }
+ { dg-final { scan-assembler "in-asm: .mof" } } */
+ { dg-final { scan-assembler "out-asm: .mof" } } */
+ { dg-final { scan-assembler "in2-asm: .mof" } } */
+ { dg-final { scan-assembler "out2-asm: .mof" } } */
+ #endif
#if 0
/* Various small functions to replace macros. Only called from a
Index: gcc/config/cris/cris.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.h,v
retrieving revision 1.84
diff -c -p -r1.84 cris.h
*** gcc/config/cris/cris.h 8 Feb 2005 15:35:12 -0000 1.84
--- gcc/config/cris/cris.h 27 Feb 2005 15:36:10 -0000
*************** Boston, MA 02111-1307, USA. */
*** 50,61 ****
#define CRIS_FIRST_ARG_REG 10
#define CRIS_MAX_ARGS_IN_REGS 4
! /* Other convenience definitions. */
! #define CRIS_PC_REGNUM 15
! #define CRIS_SRP_REGNUM 16
/* Most of the time, we need the index into the register-names array.
! When passing debug-info, we need the real register number. */
#define CRIS_CANONICAL_SRP_REGNUM (16 + 11)
#define CRIS_CANONICAL_MOF_REGNUM (16 + 7)
--- 50,59 ----
#define CRIS_FIRST_ARG_REG 10
#define CRIS_MAX_ARGS_IN_REGS 4
! /* See also *_REGNUM constants in cris.md. */
/* Most of the time, we need the index into the register-names array.
! When passing debug-info, we need the real hardware register number. */
#define CRIS_CANONICAL_SRP_REGNUM (16 + 11)
#define CRIS_CANONICAL_MOF_REGNUM (16 + 7)
*************** extern int target_flags;
*** 602,610 ****
/* Node: Register Basics */
! /* We count all 16 non-special registers, SRP and a faked argument
! pointer register. */
! #define FIRST_PSEUDO_REGISTER (16 + 1 + 1)
/* For CRIS, these are r15 (pc) and r14 (sp). Register r8 is used as a
frame-pointer, but is not fixed. SRP is not included in general
--- 600,608 ----
/* Node: Register Basics */
! /* We count all 16 non-special registers, SRP, a faked argument
! pointer register and MOF. */
! #define FIRST_PSEUDO_REGISTER (16 + 1 + 1 + 1)
/* For CRIS, these are r15 (pc) and r14 (sp). Register r8 is used as a
frame-pointer, but is not fixed. SRP is not included in general
*************** extern int target_flags;
*** 612,623 ****
registers are fixed at the moment. The faked argument pointer register
is fixed too. */
#define FIXED_REGISTERS \
! {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1}
/* Register r9 is used for structure-address, r10-r13 for parameters,
r10- for return values. */
#define CALL_USED_REGISTERS \
! {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1}
#define CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage ()
--- 610,621 ----
registers are fixed at the moment. The faked argument pointer register
is fixed too. */
#define FIXED_REGISTERS \
! {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1}
/* Register r9 is used for structure-address, r10-r13 for parameters,
r10- for return values. */
#define CALL_USED_REGISTERS \
! {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1}
#define CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage ()
*************** extern int target_flags;
*** 643,649 ****
Use struct-return address first, since very few functions use
structure return values so it is likely to be available. */
#define REG_ALLOC_ORDER \
! {9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 14, 15, 16, 17}
/* Node: Values in Registers */
--- 641,647 ----
Use struct-return address first, since very few functions use
structure return values so it is likely to be available. */
#define REG_ALLOC_ORDER \
! {9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 14, 15, 18, 16, 17}
/* Node: Values in Registers */
*************** extern int target_flags;
*** 674,700 ****
class for special registers, and yet another class for the
multiply-overflow register in v10; then a class for the return
register also makes sense. */
! enum reg_class {NO_REGS, ALL_REGS, LIM_REG_CLASSES};
#define N_REG_CLASSES (int) LIM_REG_CLASSES
! #define REG_CLASS_NAMES {"NO_REGS", "ALL_REGS"}
! #define GENERAL_REGS ALL_REGS
/* Count in the faked argument register in GENERAL_REGS. Keep out SRP. */
! #define REG_CLASS_CONTENTS {{0}, {0x2ffff}}
!
! #define REGNO_REG_CLASS(REGNO) GENERAL_REGS
#define BASE_REG_CLASS GENERAL_REGS
#define INDEX_REG_CLASS GENERAL_REGS
! /* Get reg_class from a letter such as appears in the machine
! description. No letters are used, since 'r' is used for any
! register. */
! #define REG_CLASS_FROM_LETTER(C) NO_REGS
/* Since it uses reg_renumber, it is safe only once reg_renumber
has been allocated, which happens in local-alloc.c. */
--- 672,717 ----
class for special registers, and yet another class for the
multiply-overflow register in v10; then a class for the return
register also makes sense. */
! enum reg_class
! {
! NO_REGS,
! MOF_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
! LIM_REG_CLASSES
! };
#define N_REG_CLASSES (int) LIM_REG_CLASSES
! #define REG_CLASS_NAMES \
! {"NO_REGS", "MOF_REGS", "SPECIAL_REGS", "GENERAL_REGS", "ALL_REGS"}
! #define CRIS_SPECIAL_REGS_CONTENTS \
! ((1 << CRIS_SRP_REGNUM) | (1 << CRIS_MOF_REGNUM))
/* Count in the faked argument register in GENERAL_REGS. Keep out SRP. */
! #define REG_CLASS_CONTENTS \
! { \
! {0}, \
! {1 << CRIS_MOF_REGNUM}, \
! {CRIS_SPECIAL_REGS_CONTENTS}, \
! {0x2ffff}, \
! {0x2ffff | CRIS_SPECIAL_REGS_CONTENTS} \
! }
!
! #define REGNO_REG_CLASS(REGNO) \
! ((REGNO) == CRIS_MOF_REGNUM ? MOF_REGS : \
! (REGNO) == CRIS_SRP_REGNUM ? SPECIAL_REGS : \
! GENERAL_REGS)
#define BASE_REG_CLASS GENERAL_REGS
#define INDEX_REG_CLASS GENERAL_REGS
! #define REG_CLASS_FROM_LETTER(C) \
! ( \
! (C) == 'h' ? MOF_REGS : \
! (C) == 'x' ? SPECIAL_REGS : \
! NO_REGS \
! )
/* Since it uses reg_renumber, it is safe only once reg_renumber
has been allocated, which happens in local-alloc.c. */
*************** enum reg_class {NO_REGS, ALL_REGS, LIM_R
*** 710,718 ****
/* It seems like gcc (2.7.2 and 2.9x of 2000-03-22) may send "NO_REGS" as
the class for a constant (testcase: __Mul in arit.c). To avoid forcing
out a constant into the constant pool, we will trap this case and
! return something a bit more sane. FIXME: Check if this is a bug. */
! #define PREFERRED_RELOAD_CLASS(X, CLASS) \
! ((CLASS) == NO_REGS ? GENERAL_REGS : (CLASS))
/* For CRIS, this is always the size of MODE in words,
since all registers are the same size. To use omitted modes in
--- 727,749 ----
/* It seems like gcc (2.7.2 and 2.9x of 2000-03-22) may send "NO_REGS" as
the class for a constant (testcase: __Mul in arit.c). To avoid forcing
out a constant into the constant pool, we will trap this case and
! return something a bit more sane. FIXME: Check if this is a bug.
! Beware that we must not "override" classes that can be specified as
! constraint letters, or else asm operands using them will fail when
! they need to be reloaded. FIXME: Investigate whether that constitutes
! a bug. */
! #define PREFERRED_RELOAD_CLASS(X, CLASS) \
! ((CLASS) != MOF_REGS \
! && (CLASS) != SPECIAL_REGS \
! ? GENERAL_REGS : (CLASS))
!
! /* We can't move special registers to and from memory in smaller than
! word_mode. */
! #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
! (((CLASS) != SPECIAL_REGS && (CLASS) != MOF_REGS) \
! || GET_MODE_SIZE (MODE) == 4 \
! || GET_CODE (X) != MEM \
! ? NO_REGS : GENERAL_REGS)
/* For CRIS, this is always the size of MODE in words,
since all registers are the same size. To use omitted modes in
*************** enum reg_class {NO_REGS, ALL_REGS, LIM_R
*** 776,785 ****
( \
/* Slottable addressing modes: \
A register? FIXME: Unnecessary. */ \
! (BASE_P (X) && REGNO (X) != CRIS_PC_REGNUM) \
/* Indirect register: [reg]? */ \
! || (GET_CODE (X) == MEM && BASE_P (XEXP (X, 0)) \
! && REGNO (XEXP (X, 0)) != CRIS_PC_REGNUM) \
)
#define EXTRA_CONSTRAINT_R(X) \
--- 807,815 ----
( \
/* Slottable addressing modes: \
A register? FIXME: Unnecessary. */ \
! BASE_P (X) \
/* Indirect register: [reg]? */ \
! || (GET_CODE (X) == MEM && BASE_P (XEXP (X, 0))) \
)
#define EXTRA_CONSTRAINT_R(X) \
*************** enum reg_class {NO_REGS, ALL_REGS, LIM_R
*** 884,900 ****
/* Node: Frame Registers */
! #define STACK_POINTER_REGNUM 14
/* Register used for frame pointer. This is also the last of the saved
registers, when a frame pointer is not used. */
! #define FRAME_POINTER_REGNUM 8
/* Faked register, is always eliminated. We need it to eliminate
allocating stack slots for the return address and the frame pointer. */
! #define ARG_POINTER_REGNUM 17
! #define STATIC_CHAIN_REGNUM 7
/* Node: Elimination */
--- 914,930 ----
/* Node: Frame Registers */
! #define STACK_POINTER_REGNUM CRIS_SP_REGNUM
/* Register used for frame pointer. This is also the last of the saved
registers, when a frame pointer is not used. */
! #define FRAME_POINTER_REGNUM CRIS_FP_REGNUM
/* Faked register, is always eliminated. We need it to eliminate
allocating stack slots for the return address and the frame pointer. */
! #define ARG_POINTER_REGNUM CRIS_AP_REGNUM
! #define STATIC_CHAIN_REGNUM CRIS_STATIC_CHAIN_REGNUM
/* Node: Elimination */
*************** struct cum_args {int regs;};
*** 1295,1302 ****
/* Node: Costs */
! /* FIXME: Need to define REGISTER_MOVE_COST when more register classes are
! introduced. */
/* This isn't strictly correct for v0..3 in buswidth-8bit mode, but
should suffice. */
--- 1325,1356 ----
/* Node: Costs */
! /* Can't move to and from a SPECIAL_REGS register, so we have to say
! their move cost within that class is higher. How about 7? That's 3
! for a move to a GENERAL_REGS register, 3 for the move from the
! GENERAL_REGS register, and 1 for the increased register pressure.
! Also, it's higher than the memory move cost, which is in order.
! We also do this for ALL_REGS, since we don't want that class to be
! preferred (even to memory) at all where GENERAL_REGS doesn't fit.
! Whenever it's about to be used, it's for SPECIAL_REGS. If we don't
! present a higher cost for ALL_REGS than memory, a SPECIAL_REGS may be
! used when a GENERAL_REGS should be used, even if there are call-saved
! GENERAL_REGS left to allocate. This is because the fall-back when
! the most preferred register class isn't available, isn't the next
! (or next good) wider register class, but the *most widest* register
! class.
! Give the cost 3 between a special register and a general register,
! because we want constraints verified. */
!
! #define REGISTER_MOVE_COST(MODE, FROM, TO) \
! ((((FROM) == SPECIAL_REGS || (FROM) == MOF_REGS) \
! && ((TO) == SPECIAL_REGS || (TO) == MOF_REGS)) \
! || (FROM) == ALL_REGS \
! || (TO) == ALL_REGS \
! ? 7 : \
! ((FROM) == SPECIAL_REGS || (FROM) == MOF_REGS \
! || (TO) == SPECIAL_REGS || (TO) == MOF_REGS) \
! ? 3 : 2)
/* This isn't strictly correct for v0..3 in buswidth-8bit mode, but
should suffice. */
*************** struct cum_args {int regs;};
*** 1330,1336 ****
/* Node: PIC */
! #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 0 : INVALID_REGNUM)
#define LEGITIMATE_PIC_OPERAND_P(X) cris_legitimate_pic_operand (X)
--- 1384,1390 ----
/* Node: PIC */
! #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CRIS_GOT_REGNUM : INVALID_REGNUM)
#define LEGITIMATE_PIC_OPERAND_P(X) cris_legitimate_pic_operand (X)
*************** struct cum_args {int regs;};
*** 1446,1452 ****
#define REGISTER_NAMES \
{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
! "r9", "r10", "r11", "r12", "r13", "sp", "pc", "srp", "faked_ap"}
#define ADDITIONAL_REGISTER_NAMES \
{{"r14", 14}, {"r15", 15}}
--- 1500,1506 ----
#define REGISTER_NAMES \
{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
! "r9", "r10", "r11", "r12", "r13", "sp", "pc", "srp", "faked_ap", "mof"}
#define ADDITIONAL_REGISTER_NAMES \
{{"r14", 14}, {"r15", 15}}
*************** struct cum_args {int regs;};
*** 1532,1539 ****
/* Node: All Debuggers */
! #define DBX_REGISTER_NUMBER(REGNO) \
! ((REGNO) == CRIS_SRP_REGNUM ? CRIS_CANONICAL_SRP_REGNUM : (REGNO))
/* FIXME: Investigate DEBUGGER_AUTO_OFFSET, DEBUGGER_ARG_OFFSET. */
--- 1586,1595 ----
/* Node: All Debuggers */
! #define DBX_REGISTER_NUMBER(REGNO) \
! ((REGNO) == CRIS_SRP_REGNUM ? CRIS_CANONICAL_SRP_REGNUM : \
! (REGNO) == CRIS_MOF_REGNUM ? CRIS_CANONICAL_MOF_REGNUM : \
! (REGNO))
/* FIXME: Investigate DEBUGGER_AUTO_OFFSET, DEBUGGER_ARG_OFFSET. */
Index: gcc/config/cris/cris.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/cris/cris.md,v
retrieving revision 1.22
diff -c -p -r1.22 cris.md
*** gcc/config/cris/cris.md 24 Feb 2005 16:59:25 -0000 1.22
--- gcc/config/cris/cris.md 27 Feb 2005 15:36:10 -0000
***************
*** 59,64 ****
--- 59,76 ----
;; 0 PLT reference from call expansion: operand 0 is the address,
;; the mode is VOIDmode. Always wrapped in CONST.
+
+ ;; Register numbers.
+ (define_constants
+ [(CRIS_GOT_REGNUM 0)
+ (CRIS_STATIC_CHAIN_REGNUM 7)
+ (CRIS_FP_REGNUM 8)
+ (CRIS_SP_REGNUM 14)
+ (CRIS_SRP_REGNUM 16)
+ (CRIS_AP_REGNUM 17)
+ (CRIS_MOF_REGNUM 18)]
+ )
+
;; We need an attribute to define whether an instruction can be put in
;; a branch-delay slot or not, and whether it has a delay slot.
;;
***************
*** 993,1003 ****
(define_insn "*movsi_internal"
[(set
! (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,Q>,r,Q>,g,r,r,r,g")
(match_operand:SI 1
;; FIXME: We want to put S last, but apparently g matches S.
;; It's a bug: an S is not a general_operand and shouldn't match g.
! "cris_general_operand_or_gotless_symbol" "r,Q>,M,M,I,r,M,n,!S,g,r"))]
""
"*
{
--- 1005,1015 ----
(define_insn "*movsi_internal"
[(set
! (match_operand:SI 0 "nonimmediate_operand" "=r,r, r,Q>,r,Q>,g,r,r, r,g,rQ>,x, m,x")
(match_operand:SI 1
;; FIXME: We want to put S last, but apparently g matches S.
;; It's a bug: an S is not a general_operand and shouldn't match g.
! "cris_general_operand_or_gotless_symbol" "r,Q>,M,M, I,r, M,n,!S,g,r,x, rQ>,x,gi"))]
""
"*
{
***************
*** 1013,1018 ****
--- 1025,1036 ----
case 10:
return \"move.d %1,%0\";
+ case 11:
+ case 12:
+ case 13:
+ case 14:
+ return \"move %d1,%0\";
+
case 2:
case 3:
case 6:
***************
*** 1058,1064 ****
return \"BOGUS: %1 to %0\";
}
}"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,no,no,no,no")])
;; Extend operations with side-effect from mem to register, using
;; MOVS/MOVU. These are from mem to register only.
--- 1076,1083 ----
return \"BOGUS: %1 to %0\";
}
}"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,no,no,no,no,yes,yes,no,no")
! (set_attr "cc" "*,*,*,*,*,*,*,*,*,*,*,none,none,none,none")])
;; Extend operations with side-effect from mem to register, using
;; MOVS/MOVU. These are from mem to register only.
***************
*** 1206,1213 ****
(define_insn "movhi"
[(set
! (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,Q>,r,Q>,r,r,r,g,g,r")
! (match_operand:HI 1 "general_operand" "r,Q>,M,M,I,r,L,O,n,M,r,g"))]
""
"*
{
--- 1225,1232 ----
(define_insn "movhi"
[(set
! (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,Q>,r,Q>,r,r,r,g,g,r,r,x")
! (match_operand:HI 1 "general_operand" "r,Q>,M,M,I,r,L,O,n,M,r,g,x,r"))]
""
"*
{
***************
*** 1219,1224 ****
--- 1238,1246 ----
case 10:
case 11:
return \"move.w %1,%0\";
+ case 12:
+ case 13:
+ return \"move %1,%0\";
case 2:
case 3:
case 9:
***************
*** 1240,1250 ****
return \"BOGUS: %1 to %0\";
}
}"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,yes,no,no,no,no")
! (set (attr "cc")
! (if_then_else (eq_attr "alternative" "7")
! (const_string "clobber")
! (const_string "normal")))])
(define_insn "movstricthi"
[(set
--- 1262,1269 ----
return \"BOGUS: %1 to %0\";
}
}"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,yes,no,no,no,no,yes,yes")
! (set_attr "cc" "*,*,none,none,*,none,*,clobber,*,none,none,*,none,none")])
(define_insn "movstricthi"
[(set
***************
*** 1262,1271 ****
move.w %1,%0
move.w %1,%0"
[(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
(define_insn "movqi"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=r,Q>,r,r,Q>,r,g,g,r,r")
! (match_operand:QI 1 "general_operand" "r,r,Q>,M,M,I,M,r,O,g"))]
""
"@
move.b %1,%0
--- 1281,1306 ----
move.w %1,%0
move.w %1,%0"
[(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
+
+ (define_expand "reload_inhi"
+ [(set (match_operand:HI 2 "register_operand" "=r")
+ (match_operand:HI 1 "memory_operand" "m"))
+ (set (match_operand:HI 0 "register_operand" "=x")
+ (match_dup 2))]
+ ""
+ "")
+
+ (define_expand "reload_outhi"
+ [(set (match_operand:HI 2 "register_operand" "=r")
+ (match_operand:HI 1 "register_operand" "x"))
+ (set (match_operand:HI 0 "memory_operand" "=m")
+ (match_dup 2))]
+ ""
+ "")
(define_insn "movqi"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=r,Q>,r,r,Q>,r,g,g,r,r,r,x")
! (match_operand:QI 1 "general_operand" "r,r,Q>,M,M,I,M,r,O,g,x,r"))]
""
"@
move.b %1,%0
***************
*** 1277,1288 ****
clear.b %0
move.b %1,%0
moveq %b1,%0
! move.b %1,%0"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,no,yes,no")
! (set (attr "cc")
! (if_then_else (eq_attr "alternative" "8")
! (const_string "clobber")
! (const_string "normal")))])
(define_insn "movstrictqi"
[(set (strict_low_part
--- 1312,1322 ----
clear.b %0
move.b %1,%0
moveq %b1,%0
! move.b %1,%0
! move %1,%0
! move %1,%0"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,no,yes,no,yes,yes")
! (set_attr "cc" "*,*,*,*,*,*,*,*,clobber,*,none,none")])
(define_insn "movstrictqi"
[(set (strict_low_part
***************
*** 1300,1313 ****
move.b %1,%0"
[(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
;; The valid "quick" bit-patterns are, except for 0.0, denormalized
;; values REALLY close to 0, and some NaN:s (I think; their exponent is
;; all ones); the worthwhile one is "0.0".
;; It will use clear, so we know ALL types of immediate 0 never change cc.
(define_insn "movsf"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=r,Q>,r,r,Q>,g,g,r")
! (match_operand:SF 1 "general_operand" "r,r,Q>,G,G,G,r,g"))]
""
"@
move.d %1,%0
--- 1334,1363 ----
move.b %1,%0"
[(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
+ (define_expand "reload_inqi"
+ [(set (match_operand:QI 2 "register_operand" "=r")
+ (match_operand:QI 1 "memory_operand" "m"))
+ (set (match_operand:QI 0 "register_operand" "=x")
+ (match_dup 2))]
+ ""
+ "")
+
+ (define_expand "reload_outqi"
+ [(set (match_operand:QI 2 "register_operand" "=r")
+ (match_operand:QI 1 "register_operand" "x"))
+ (set (match_operand:QI 0 "memory_operand" "=m")
+ (match_dup 2))]
+ ""
+ "")
+
;; The valid "quick" bit-patterns are, except for 0.0, denormalized
;; values REALLY close to 0, and some NaN:s (I think; their exponent is
;; all ones); the worthwhile one is "0.0".
;; It will use clear, so we know ALL types of immediate 0 never change cc.
(define_insn "movsf"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=r,Q>,r, r,Q>,g,g,r,r,x,Q>,m,x, x")
! (match_operand:SF 1 "general_operand" "r,r, Q>,G,G, G,r,g,x,r,x, x,Q>,g"))]
""
"@
move.d %1,%0
***************
*** 1317,1324 ****
clear.d %0
clear.d %0
move.d %1,%0
! move.d %1,%0"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no")])
;; Sign- and zero-extend insns with standard names.
--- 1367,1380 ----
clear.d %0
clear.d %0
move.d %1,%0
! move.d %1,%0
! move %1,%0
! move %1,%0
! move %1,%0
! move %1,%0
! move %1,%0
! move %1,%0"
! [(set_attr "slottable" "yes,yes,yes,yes,yes,no,no,no,yes,yes,yes,no,yes,no")])
;; Sign- and zero-extend insns with standard names.
***************
*** 4662,4668 ****
&& REG_P (operands[0])
&& GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
&& (GET_CODE (XEXP (operands[1], 0)) == MEM
! || CONSTANT_P (XEXP (operands[1], 0)))"
[(set (match_dup 2) (match_dup 4))
(set (match_dup 0) (match_dup 3))]
"operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
--- 4718,4725 ----
&& REG_P (operands[0])
&& GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
&& (GET_CODE (XEXP (operands[1], 0)) == MEM
! || CONSTANT_P (XEXP (operands[1], 0)))
! && REGNO (operands[0]) < CRIS_LAST_GENERAL_REGISTER"
[(set (match_dup 2) (match_dup 4))
(set (match_dup 0) (match_dup 3))]
"operands[2] = gen_rtx_REG (Pmode, REGNO (operands[0]));
***************
*** 4997,5002 ****
--- 5054,5061 ----
(set (match_operand 2 "register_operand" "")
(match_operator 3 "cris_mem_op" [(match_dup 0)]))]
"REGNO (operands[0]) == REGNO (operands[2])
+ && (REGNO_REG_CLASS (REGNO (operands[0]))
+ == REGNO_REG_CLASS (REGNO (operands[1])))
&& GET_MODE_SIZE (GET_MODE (operands[2])) <= UNITS_PER_WORD"
[(set (match_dup 2) (match_dup 4))]
"operands[4] = replace_equiv_address (operands[3], operands[1]);")
Index: gcc/config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.795
diff -c -p -r1.795 i386.c
*** gcc/config/i386/i386.c 2 Feb 2005 00:30:27 -0000 1.795
--- gcc/config/i386/i386.c 27 Feb 2005 15:36:12 -0000
*************** static tree ix86_handle_struct_attribute
*** 921,927 ****
static int extended_reg_mentioned_1 (rtx *, void *);
static bool ix86_rtx_costs (rtx, int, int, int *);
static int min_insn_size (rtx);
! static tree ix86_md_asm_clobbers (tree clobbers);
static bool ix86_must_pass_in_stack (enum machine_mode mode, tree type);
static bool ix86_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
tree, bool);
--- 921,927 ----
static int extended_reg_mentioned_1 (rtx *, void *);
static bool ix86_rtx_costs (rtx, int, int, int *);
static int min_insn_size (rtx);
! static tree ix86_md_asm_clobbers (tree outputs, tree inputs, tree clobbers);
static bool ix86_must_pass_in_stack (enum machine_mode mode, tree type);
static bool ix86_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
tree, bool);
*************** ix86_vector_mode_supported_p (enum machi
*** 16863,16869 ****
with the old cc0-based compiler. */
static tree
! ix86_md_asm_clobbers (tree clobbers)
{
clobbers = tree_cons (NULL_TREE, build_string (5, "flags"),
clobbers);
--- 16863,16871 ----
with the old cc0-based compiler. */
static tree
! ix86_md_asm_clobbers (tree outputs ATTRIBUTE_UNUSED,
! tree inputs ATTRIBUTE_UNUSED,
! tree clobbers)
{
clobbers = tree_cons (NULL_TREE, build_string (5, "flags"),
clobbers);
Index: gcc/doc/tm.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/tm.texi,v
retrieving revision 1.414
diff -c -p -r1.414 tm.texi
*** gcc/doc/tm.texi 23 Feb 2005 23:11:08 -0000 1.414
--- gcc/doc/tm.texi 27 Feb 2005 15:36:18 -0000
*************** from shared libraries (DLLs).
*** 9250,9260 ****
You need not define this macro if it would always evaluate to zero.
@end defmac
! @deftypefn {Target Hook} tree TARGET_MD_ASM_CLOBBERS (tree @var{clobbers})
This target hook should add to @var{clobbers} @code{STRING_CST} trees for
! any hard regs the port wishes to automatically clobber for all asms.
It should return the result of the last @code{tree_cons} used to add a
! clobber.
@end deftypefn
@defmac MATH_LIBRARY
--- 9250,9264 ----
You need not define this macro if it would always evaluate to zero.
@end defmac
! @deftypefn {Target Hook} tree TARGET_MD_ASM_CLOBBERS (tree @var{outputs}, tree @var{inputs}, tree @var{clobbers})
This target hook should add to @var{clobbers} @code{STRING_CST} trees for
! any hard regs the port wishes to automatically clobber for an asm.
It should return the result of the last @code{tree_cons} used to add a
! clobber. The @var{outputs}, @var{inputs} and @var{clobber} lists are the
! corresponding parameters to the asm and may be inspected to avoid
! clobbering a register that is an input or output of the asm. You can use
! @code{decl_overlaps_hard_reg_set_p}, declared in @file{tree.h}, to test
! for overlap with regards to asm-declared registers.
@end deftypefn
@defmac MATH_LIBRARY
brgds, H-P