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Re: [PATCH, i386] Avoid FP constants in wrong register set


On Wed, Jan 26, 2005 at 10:36:27AM +0100, Uros Bizjak wrote:
> Hm, aren't these always vector mode (V4SF etc.) zeros?

No.

> I suggest that for TARGET_SSE_MATH, SSE registers are preferred for 
> {DF,SF}mode constants (including zero) and vice versa for -mfpmath=387. 
> Otherwise, these situations can occur:
> 
> ...
> 80fe5bc:    d9 ee                    fldz  
> 80fe5be:    dd 5c 24 40              fstpl  0x40(%esp,1)
> 80fe5c2:    f2 0f 10 5c 24 40        movsd  0x40(%esp,1),%xmm3
> ...
> 
> and
> 
> ...
> 804c4d7:    d9 e8                    fld1  
> 804c4d9:    dd 5c 24 28              fstpl  0x28(%esp,1)
> 804c4dd:    f2 0f 10 64 24 28        movsd  0x28(%esp,1),%xmm4
> ...

Guh.  Now we're probably looking at some solution that looks like

  http://gcc.gnu.org/ml/gcc-patches/2005-01/msg01286.html


r~


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