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Re: [PATCH] Fix *two* AVR backend bugs (PR19293 + PR19329)


On Sun, Jan 23, 2005 at 08:17:25PM -0500, Paul Schlie wrote:

> (but still wonder if GCC things the cc is set for shifts of 0 if not
> optimized away?)

Thanks - see the avr.md patch below (in addition to the previous avr.c
patch, both should go under one ChangeLog entry).  Constraint letter "L"
means zero.  Setting "cc" to "none" means that the insn doesn't change
the condition code, which is what we should expect from a no-op :)

Marek

	* config/avr/avr.md (ashlqi3, ashlhi3, ashlsi3, *ashlhi3_const,
	*ashlsi3_const, ashrqi3, ashrhi3, ashrsi3, *ashrhi3_const,
	*ashrsi3_const, lshrqi3, lshrhi3, lshrsi3, *lshrhi3_const,
	*lshrsi3_const): Add alternatives for zero shift count, with
	attribute "length" set to 0 and "cc" set to "none".

Index: avr.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.md,v
retrieving revision 1.47
diff -c -3 -p -r1.47 avr.md
*** avr.md	2 Sep 2004 17:20:05 -0000	1.47
--- avr.md	24 Jan 2005 08:53:07 -0000
***************
*** 1167,1197 ****
  ;; arithmetic shift left
  
  (define_insn "ashlqi3"
!   [(set (match_operand:QI 0 "register_operand"           "=r,r,r,!d,r,r")
! 	(ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0")
! 		   (match_operand:QI 2 "general_operand"  "r,P,K,n,n,Qm")))]
    ""
    "* return ashlqi3_out (insn, operands, NULL);"
!   [(set_attr "length" "5,1,2,4,6,9")
!    (set_attr "cc" "clobber,set_czn,set_czn,set_czn,set_czn,clobber")])
  
  (define_insn "ashlhi3"
!   [(set (match_operand:HI 0 "register_operand"           "=r,r,r,r,r,r")
! 	(ashift:HI (match_operand:HI 1 "register_operand" "0,0,r,0,0,0")
! 		   (match_operand:QI 2 "general_operand"  "r,P,O,K,n,Qm")))]
    ""
    "* return ashlhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "6,2,2,4,10,10")
!    (set_attr "cc" "clobber,set_n,clobber,set_n,clobber,clobber")])
  
  (define_insn "ashlsi3"
!   [(set (match_operand:SI 0 "register_operand"           "=r,r,r,r,r,r")
! 	(ashift:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0,0")
! 		   (match_operand:QI 2 "general_operand"  "r,P,O,K,n,Qm")))]
    ""
    "* return ashlsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "8,4,4,8,10,12")
!    (set_attr "cc" "clobber,set_n,clobber,set_n,clobber,clobber")])
  
  ;; Optimize if a scratch register from LD_REGS happens to be available.
  
--- 1167,1197 ----
  ;; arithmetic shift left
  
  (define_insn "ashlqi3"
!   [(set (match_operand:QI 0 "register_operand"           "=r,r,r,r,!d,r,r")
! 	(ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
! 		   (match_operand:QI 2 "general_operand"  "r,L,P,K,n,n,Qm")))]
    ""
    "* return ashlqi3_out (insn, operands, NULL);"
!   [(set_attr "length" "5,0,1,2,4,6,9")
!    (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
  
  (define_insn "ashlhi3"
!   [(set (match_operand:HI 0 "register_operand"           "=r,r,r,r,r,r,r")
! 	(ashift:HI (match_operand:HI 1 "register_operand" "0,0,0,r,0,0,0")
! 		   (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
    ""
    "* return ashlhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "6,0,2,2,4,10,10")
!    (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
  
  (define_insn "ashlsi3"
!   [(set (match_operand:SI 0 "register_operand"           "=r,r,r,r,r,r,r")
! 	(ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
! 		   (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
    ""
    "* return ashlsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "8,0,4,4,8,10,12")
!    (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
  
  ;; Optimize if a scratch register from LD_REGS happens to be available.
  
***************
*** 1207,1220 ****
       FAIL;")
  
  (define_insn "*ashlhi3_const"
!   [(set (match_operand:HI 0 "register_operand"            "=r,r,r,r")
! 	(ashift:HI (match_operand:HI 1 "register_operand"  "0,r,0,0")
! 		   (match_operand:QI 2 "const_int_operand" "P,O,K,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
    "reload_completed"
    "* return ashlhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "2,2,4,10")
!    (set_attr "cc" "set_n,clobber,set_n,clobber")])
  
  (define_peephole2
    [(match_scratch:QI 3 "d")
--- 1207,1220 ----
       FAIL;")
  
  (define_insn "*ashlhi3_const"
!   [(set (match_operand:HI 0 "register_operand"            "=r,r,r,r,r")
! 	(ashift:HI (match_operand:HI 1 "register_operand"  "0,0,r,0,0")
! 		   (match_operand:QI 2 "const_int_operand" "L,P,O,K,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,X,&d"))]
    "reload_completed"
    "* return ashlhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "0,2,2,4,10")
!    (set_attr "cc" "none,set_n,clobber,set_n,clobber")])
  
  (define_peephole2
    [(match_scratch:QI 3 "d")
***************
*** 1228,1271 ****
       FAIL;")
  
  (define_insn "*ashlsi3_const"
!   [(set (match_operand:SI 0 "register_operand"            "=r,r,r")
! 	(ashift:SI (match_operand:SI 1 "register_operand"  "0,r,0")
! 		   (match_operand:QI 2 "const_int_operand" "P,O,n")))
!    (clobber (match_scratch:QI 3 "=X,X,&d"))]
    "reload_completed"
    "* return ashlsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "4,4,10")
!    (set_attr "cc" "set_n,clobber,clobber")])
  
  ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
  ;; arithmetic shift right
  
  (define_insn "ashrqi3"
!   [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r")
! 	(ashiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0")
! 		     (match_operand:QI 2 "general_operand" "r,P,K,n,Qm")))]
    ""
    "* return ashrqi3_out (insn, operands, NULL);"
!   [(set_attr "length" "5,1,2,5,9")
!    (set_attr "cc" "clobber,clobber,clobber,clobber,clobber")])
  
  (define_insn "ashrhi3"
!   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r")
! 	(ashiftrt:HI (match_operand:HI 1 "register_operand" "0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,P,O,K,n,Qm")))]
    ""
    "* return ashrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "6,2,4,4,10,10")
!    (set_attr "cc" "clobber,clobber,set_n,clobber,clobber,clobber")])
  
  (define_insn "ashrsi3"
!   [(set (match_operand:SI 0 "register_operand"             "=r,r,r,r,r,r")
! 	(ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,P,O,K,n,Qm")))]
    ""
    "* return ashrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "8,4,6,8,10,12")
!    (set_attr "cc" "clobber,clobber,set_n,clobber,clobber,clobber")])
  
  ;; Optimize if a scratch register from LD_REGS happens to be available.
  
--- 1228,1271 ----
       FAIL;")
  
  (define_insn "*ashlsi3_const"
!   [(set (match_operand:SI 0 "register_operand"            "=r,r,r,r")
! 	(ashift:SI (match_operand:SI 1 "register_operand"  "0,0,r,0")
! 		   (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
    "reload_completed"
    "* return ashlsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "0,4,4,10")
!    (set_attr "cc" "none,set_n,clobber,clobber")])
  
  ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
  ;; arithmetic shift right
  
  (define_insn "ashrqi3"
!   [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,r,r")
! 	(ashiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,L,P,K,n,Qm")))]
    ""
    "* return ashrqi3_out (insn, operands, NULL);"
!   [(set_attr "length" "5,0,1,2,5,9")
!    (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber")])
  
  (define_insn "ashrhi3"
!   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r,r")
! 	(ashiftrt:HI (match_operand:HI 1 "register_operand" "0,0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
    ""
    "* return ashrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "6,0,2,4,4,10,10")
!    (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")])
  
  (define_insn "ashrsi3"
!   [(set (match_operand:SI 0 "register_operand"             "=r,r,r,r,r,r,r")
! 	(ashiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
    ""
    "* return ashrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "8,0,4,6,8,10,12")
!    (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")])
  
  ;; Optimize if a scratch register from LD_REGS happens to be available.
  
***************
*** 1281,1294 ****
       FAIL;")
  
  (define_insn "*ashrhi3_const"
!   [(set (match_operand:HI 0 "register_operand"              "=r,r,r,r")
! 	(ashiftrt:HI (match_operand:HI 1 "register_operand"  "0,r,0,0")
! 		     (match_operand:QI 2 "const_int_operand" "P,O,K,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
    "reload_completed"
    "* return ashrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "2,4,4,10")
!    (set_attr "cc" "clobber,set_n,clobber,clobber")])
  
  (define_peephole2
    [(match_scratch:QI 3 "d")
--- 1281,1294 ----
       FAIL;")
  
  (define_insn "*ashrhi3_const"
!   [(set (match_operand:HI 0 "register_operand"              "=r,r,r,r,r")
! 	(ashiftrt:HI (match_operand:HI 1 "register_operand"  "0,0,r,0,0")
! 		     (match_operand:QI 2 "const_int_operand" "L,P,O,K,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,X,&d"))]
    "reload_completed"
    "* return ashrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "0,2,4,4,10")
!    (set_attr "cc" "none,clobber,set_n,clobber,clobber")])
  
  (define_peephole2
    [(match_scratch:QI 3 "d")
***************
*** 1302,1345 ****
       FAIL;")
  
  (define_insn "*ashrsi3_const"
!   [(set (match_operand:SI 0 "register_operand"              "=r,r,r")
! 	(ashiftrt:SI (match_operand:SI 1 "register_operand"  "0,r,0")
! 		     (match_operand:QI 2 "const_int_operand" "P,O,n")))
!    (clobber (match_scratch:QI 3 "=X,X,&d"))]
    "reload_completed"
    "* return ashrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "4,4,10")
!    (set_attr "cc" "clobber,set_n,clobber")])
  
  ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
  ;; logical shift right
  
  (define_insn "lshrqi3"
!   [(set (match_operand:QI 0 "register_operand"             "=r,r,r,!d,r,r")
! 	(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,P,K,n,n,Qm")))]
    ""
    "* return lshrqi3_out (insn, operands, NULL);"
!   [(set_attr "length" "5,1,2,4,6,9")
!    (set_attr "cc" "clobber,set_czn,set_czn,set_czn,set_czn,clobber")])
  
  (define_insn "lshrhi3"
!   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r")
! 	(lshiftrt:HI (match_operand:HI 1 "register_operand" "0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,P,O,K,n,Qm")))]
    ""
    "* return lshrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "6,2,2,4,10,10")
!    (set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
  
  (define_insn "lshrsi3"
!   [(set (match_operand:SI 0 "register_operand"             "=r,r,r,r,r,r")
! 	(lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,P,O,K,n,Qm")))]
    ""
    "* return lshrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "8,4,4,8,10,12")
!    (set_attr "cc" "clobber,clobber,clobber,clobber,clobber,clobber")])
  
  ;; Optimize if a scratch register from LD_REGS happens to be available.
  
--- 1302,1345 ----
       FAIL;")
  
  (define_insn "*ashrsi3_const"
!   [(set (match_operand:SI 0 "register_operand"              "=r,r,r,r")
! 	(ashiftrt:SI (match_operand:SI 1 "register_operand"  "0,0,r,0")
! 		     (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
    "reload_completed"
    "* return ashrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "0,4,4,10")
!    (set_attr "cc" "none,clobber,set_n,clobber")])
  
  ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
  ;; logical shift right
  
  (define_insn "lshrqi3"
!   [(set (match_operand:QI 0 "register_operand"             "=r,r,r,r,!d,r,r")
! 	(lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,L,P,K,n,n,Qm")))]
    ""
    "* return lshrqi3_out (insn, operands, NULL);"
!   [(set_attr "length" "5,0,1,2,4,6,9")
!    (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
  
  (define_insn "lshrhi3"
!   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r,r")
! 	(lshiftrt:HI (match_operand:HI 1 "register_operand" "0,0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
    ""
    "* return lshrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "6,0,2,2,4,10,10")
!    (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
  
  (define_insn "lshrsi3"
!   [(set (match_operand:SI 0 "register_operand"             "=r,r,r,r,r,r,r")
! 	(lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0")
! 		     (match_operand:QI 2 "general_operand"  "r,L,P,O,K,n,Qm")))]
    ""
    "* return lshrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "8,0,4,4,8,10,12")
!    (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
  
  ;; Optimize if a scratch register from LD_REGS happens to be available.
  
***************
*** 1355,1368 ****
       FAIL;")
  
  (define_insn "*lshrhi3_const"
!   [(set (match_operand:HI 0 "register_operand"              "=r,r,r,r")
! 	(lshiftrt:HI (match_operand:HI 1 "register_operand"  "0,r,0,0")
! 		     (match_operand:QI 2 "const_int_operand" "P,O,K,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
    "reload_completed"
    "* return lshrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "2,2,4,10")
!    (set_attr "cc" "clobber,clobber,clobber,clobber")])
  
  (define_peephole2
    [(match_scratch:QI 3 "d")
--- 1355,1368 ----
       FAIL;")
  
  (define_insn "*lshrhi3_const"
!   [(set (match_operand:HI 0 "register_operand"              "=r,r,r,r,r")
! 	(lshiftrt:HI (match_operand:HI 1 "register_operand"  "0,0,r,0,0")
! 		     (match_operand:QI 2 "const_int_operand" "L,P,O,K,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,X,&d"))]
    "reload_completed"
    "* return lshrhi3_out (insn, operands, NULL);"
!   [(set_attr "length" "0,2,2,4,10")
!    (set_attr "cc" "none,clobber,clobber,clobber,clobber")])
  
  (define_peephole2
    [(match_scratch:QI 3 "d")
***************
*** 1376,1389 ****
       FAIL;")
  
  (define_insn "*lshrsi3_const"
!   [(set (match_operand:SI 0 "register_operand"              "=r,r,r")
! 	(lshiftrt:SI (match_operand:SI 1 "register_operand"  "0,r,0")
! 		     (match_operand:QI 2 "const_int_operand" "P,O,n")))
!    (clobber (match_scratch:QI 3 "=X,X,&d"))]
    "reload_completed"
    "* return lshrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "4,4,10")
!    (set_attr "cc" "clobber,clobber,clobber")])
  
  ;; abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x)
  ;; abs
--- 1376,1389 ----
       FAIL;")
  
  (define_insn "*lshrsi3_const"
!   [(set (match_operand:SI 0 "register_operand"              "=r,r,r,r")
! 	(lshiftrt:SI (match_operand:SI 1 "register_operand"  "0,0,r,0")
! 		     (match_operand:QI 2 "const_int_operand" "L,P,O,n")))
!    (clobber (match_scratch:QI 3 "=X,X,X,&d"))]
    "reload_completed"
    "* return lshrsi3_out (insn, operands, NULL);"
!   [(set_attr "length" "0,4,4,10")
!    (set_attr "cc" "none,clobber,clobber,clobber")])
  
  ;; abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x)
  ;; abs


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