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S/390: Fix inefficient reload for doloop insns


Hello,

this fixes suboptimal reloads of the doloop insns if the count
register gets spilled to the stack.  The current code would first
load the stack slot into a register, then reload the value into
a *different* register, and decrement the latter.

Fixed by allowing reload to do all the reloading :-)

Bootstrapped/regtested on s390-ibm-linux and s390x-ibm-linux,
applied to mainline.

Bye,
Ulrich

ChangeLog:

	* config/s390/s390.md ("doloop_si64"): Reload input value directly
	into the register being decremented.
	("doloop_si31", "doloop_di"): Likewise.
	("*doloop_si_long"): Adapt pattern.


Index: gcc/config/s390/s390.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.151
diff -c -p -r1.151 s390.md
*** gcc/config/s390/s390.md	17 Jan 2005 23:18:42 -0000	1.151
--- gcc/config/s390/s390.md	21 Jan 2005 21:09:05 -0000
***************
*** 7266,7272 ****
            (pc)))
     (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d")
          (plus:SI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:SI 3 "=X,&d"))
     (clobber (reg:CC 33))]
    "TARGET_CPU_ZARCH"
  {
--- 7266,7272 ----
            (pc)))
     (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d")
          (plus:SI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:SI 3 "=X,&1"))
     (clobber (reg:CC 33))]
    "TARGET_CPU_ZARCH"
  {
***************
*** 7280,7287 ****
    "&& reload_completed
     && (! REG_P (operands[2])
         || ! rtx_equal_p (operands[1], operands[2]))"
!   [(set (match_dup 3) (match_dup 1))
!    (parallel [(set (reg:CCAN 33)
                     (compare:CCAN (plus:SI (match_dup 3) (const_int -1))
                                   (const_int 0)))
                (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
--- 7280,7286 ----
    "&& reload_completed
     && (! REG_P (operands[2])
         || ! rtx_equal_p (operands[1], operands[2]))"
!   [(parallel [(set (reg:CCAN 33)
                     (compare:CCAN (plus:SI (match_dup 3) (const_int -1))
                                   (const_int 0)))
                (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
***************
*** 7305,7311 ****
            (pc)))
     (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d")
          (plus:SI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:SI 3 "=X,&d"))
     (clobber (reg:CC 33))]
    "!TARGET_CPU_ZARCH"
  {
--- 7304,7310 ----
            (pc)))
     (set (match_operand:SI 2 "nonimmediate_operand" "=1,?*m*d")
          (plus:SI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:SI 3 "=X,&1"))
     (clobber (reg:CC 33))]
    "!TARGET_CPU_ZARCH"
  {
***************
*** 7319,7326 ****
    "&& reload_completed
     && (! REG_P (operands[2])
         || ! rtx_equal_p (operands[1], operands[2]))"
!   [(set (match_dup 3) (match_dup 1))
!    (parallel [(set (reg:CCAN 33)
                     (compare:CCAN (plus:SI (match_dup 3) (const_int -1))
                                   (const_int 0)))
                (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
--- 7318,7324 ----
    "&& reload_completed
     && (! REG_P (operands[2])
         || ! rtx_equal_p (operands[1], operands[2]))"
!   [(parallel [(set (reg:CCAN 33)
                     (compare:CCAN (plus:SI (match_dup 3) (const_int -1))
                                   (const_int 0)))
                (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
***************
*** 7347,7353 ****
            (pc)))
     (set (match_operand:SI 2 "register_operand" "=1,?*m*d")
          (plus:SI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:SI 3 "=X,&d"))
     (clobber (reg:CC 33))]
    "!TARGET_CPU_ZARCH"
  {
--- 7345,7351 ----
            (pc)))
     (set (match_operand:SI 2 "register_operand" "=1,?*m*d")
          (plus:SI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:SI 3 "=X,&1"))
     (clobber (reg:CC 33))]
    "!TARGET_CPU_ZARCH"
  {
***************
*** 7369,7377 ****
                (const_int 1))
            (label_ref (match_operand 0 "" ""))
            (pc)))
!    (set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*r")
          (plus:DI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:DI 3 "=X,&d"))
     (clobber (reg:CC 33))]
    "TARGET_64BIT"
  {
--- 7367,7375 ----
                (const_int 1))
            (label_ref (match_operand 0 "" ""))
            (pc)))
!    (set (match_operand:DI 2 "nonimmediate_operand" "=1,?*m*d")
          (plus:DI (match_dup 1) (const_int -1)))
!    (clobber (match_scratch:DI 3 "=X,&1"))
     (clobber (reg:CC 33))]
    "TARGET_64BIT"
  {
***************
*** 7385,7392 ****
    "&& reload_completed
     && (! REG_P (operands[2])
         || ! rtx_equal_p (operands[1], operands[2]))"
!   [(set (match_dup 3) (match_dup 1))
!    (parallel [(set (reg:CCAN 33)
                     (compare:CCAN (plus:DI (match_dup 3) (const_int -1))
                                   (const_int 0)))
                (set (match_dup 3) (plus:DI (match_dup 3) (const_int -1)))])
--- 7383,7389 ----
    "&& reload_completed
     && (! REG_P (operands[2])
         || ! rtx_equal_p (operands[1], operands[2]))"
!   [(parallel [(set (reg:CCAN 33)
                     (compare:CCAN (plus:DI (match_dup 3) (const_int -1))
                                   (const_int 0)))
                (set (match_dup 3) (plus:DI (match_dup 3) (const_int -1)))])
-- 
  Dr. Ulrich Weigand
  Linux on zSeries Development
  Ulrich.Weigand@de.ibm.com


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