This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH, i386] Disable HImode fild insn for TARGET_PARTIAL_REG_STALL


Richard Henderson wrote:

With attached patch, generated code pushes already extended operand into memory and loads this extended value into float reg:

test:
pushl %ebp
movl %esp, %ebp
movswl 8(%ebp),%eax
pushl %eax
fildl (%esp)



The question is, of course, why we aren't generating


filds 8(%ebp)


For -march=i686, we are expanding function prologue (.c.00.expand) to:

...
(insn 7 8 9 0 (set (reg/v:SI 59 [ x ])
       (sign_extend:SI (subreg:HI (reg:SI 60) 0))) -1 (nil)
   (nil))

(note 9 7 10 0 NOTE_INSN_FUNCTION_BEG)
...

Note the sign_extend, that is not present for -march=pentium4, where reg 59 is in HImode.

A HImode FP load is then expanded as:

(insn 15 14 16 1 (set (reg:SF 64)
       (float:SF (subreg/s:HI (reg/v:SI 59 [ x ]) 0))) -1 (nil)
   (nil))

However, it looks that expander is truncating register to HImode, but it could just use SImode insn instead. Unfortunatelly, above insn is converted to:

       pushw   %ax
       filds   (%esp)

Uros.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]