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[PATCH, ARM] Avoid using VFP registers for SImode


Not sure if this really counts as a bug, but VFP support is new in
gcc-4, so this can't introduce a regression.

On ARM processors with VFP floating point, using the VFP registers for
integer values (except when we are about to convert them into floating
point values) is a bad idea.  However, GCC is far too keen to try this
when register pressure starts to increase.  This patch fixes this by
hiding the VFP register classes from the register preferencing pass.

Tested on arm-elf with VFP enabled.

R.

2004-01-05  Richard Earnshaw  <rearnsha@arm.com>

	* arm/vfp.md (arm_movsi_vfp): Hide VFP register classes from register
	preferencing.


Index: config/arm/vfp.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/vfp.md,v
retrieving revision 1.7
diff -p -r1.7 vfp.md
*** config/arm/vfp.md	18 Sep 2004 19:19:31 -0000	1.7
--- config/arm/vfp.md	5 Jan 2005 11:20:09 -0000
***************
*** 111,118 ****
  ;; ??? For now do not allow loading constants into vfp regs.  This causes
  ;; problems because small constants get converted into adds.
  (define_insn "*arm_movsi_vfp"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,m,!w,r,!w,!w,  Uv")
!       (match_operand:SI 1 "general_operand"	   "rI,K,mi,r,r,!w,!w,Uvi,!w"))]
    "TARGET_ARM && TARGET_VFP && TARGET_HARD_FLOAT
     && (   s_register_operand (operands[0], SImode)
         || s_register_operand (operands[1], SImode))"
--- 111,118 ----
  ;; ??? For now do not allow loading constants into vfp regs.  This causes
  ;; problems because small constants get converted into adds.
  (define_insn "*arm_movsi_vfp"
!   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,m,*w,r,*w,*w, *Uv")
!       (match_operand:SI 1 "general_operand"	   "rI,K,mi,r,r,*w,*w,*Uvi,*w"))]
    "TARGET_ARM && TARGET_VFP && TARGET_HARD_FLOAT
     && (   s_register_operand (operands[0], SImode)
         || s_register_operand (operands[1], SImode))"

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