Patch for PR 18027 (IA-64 documentation)

[Steve Ellcey <sje at cup dot hp dot com>]

PR 18027 mentions several undocumented options on IA-64.  This patch
adds all the missing options that I found for IA-64 to invoke.texi.

For the HP-UX specific options, I just added a line in the description
that they are only recognized on HP-UX.  I don't know if there is a more
formal way to do this.

OK for checkin?  Should this be checked in on the 3.4 branch as well?
The options all exist in 3.4.*.

Steve Ellcey
sje@cup.hp.com


2004-12-13  Steve Ellcey  <sje@cup.hp.com>

	* doc/invoke.texi (IA-64 options): Add existing options that
	weren't already listed.


*** gcc.orig/gcc/doc/invoke.texi	Mon Dec 13 15:57:02 2004
--- gcc/gcc/doc/invoke.texi	Mon Dec 13 15:56:46 2004
*************** Objective-C and Objective-C++ Dialects}.
*** 502,509 ****
  -mconstant-gp  -mauto-pic  -minline-float-divide-min-latency @gol
  -minline-float-divide-max-throughput @gol
  -minline-int-divide-min-latency @gol
! -minline-int-divide-max-throughput  -mno-dwarf2-asm @gol
! -mfixed-range=@var{register-range}}
  
  @emph{M32R/D Options}
  @gccoptlist{-m32r2 -m32rx -m32r @gol
--- 502,512 ----
  -mconstant-gp  -mauto-pic  -minline-float-divide-min-latency @gol
  -minline-float-divide-max-throughput @gol
  -minline-int-divide-min-latency @gol
! -minline-int-divide-max-throughput  @gol
! -minline-sqrt-min-latency -minline-sqrt-max-throughput @gol
! -mno-dwarf2-asm -mearly-stop-bits @gol
! -mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol
! -mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64}
  
  @emph{M32R/D Options}
  @gccoptlist{-m32r2 -m32rx -m32r @gol
*************** using the minimum latency algorithm.
*** 8840,8845 ****
--- 8843,8858 ----
  Generate code for inline divides of integer values
  using the maximum throughput algorithm.
  
+ @item -minline-sqrt-min-latency
+ @opindex minline-sqrt-min-latency
+ Generate code for inline square roots
+ using the minimum latency algorithm.
+ 
+ @item -minline-sqrt-max-throughput
+ @opindex minline-sqrt-max-throughput
+ Generate code for inline square roots
+ using the maximum throughput algorithm.
+ 
  @item -mno-dwarf2-asm
  @itemx -mdwarf2-asm
  @opindex mno-dwarf2-asm
*************** using the maximum throughput algorithm.
*** 8847,8852 ****
--- 8860,8873 ----
  Don't (or do) generate assembler code for the DWARF2 line number debugging
  info.  This may be useful when not using the GNU assembler.
  
+ @item -mearly-stop-bits
+ @itemx -mno-early-stop-bits
+ @opindex mearly-stop-bits
+ @opindex mno-early-stop-bits
+ Allow stop bits to be placed earlier than immediately preceding the
+ instruction that triggered the stop bit.  This can improve instruction
+ scheduling, but does not always do so.
+ 
  @item -mfixed-range=@var{register-range}
  @opindex mfixed-range
  Generate code treating the given register range as fixed registers.
*************** useful when compiling kernel code.  A re
*** 8855,8867 ****
  two registers separated by a dash.  Multiple register ranges can be
  specified separated by a comma.
  
! @item -mearly-stop-bits
! @itemx -mno-early-stop-bits
! @opindex mearly-stop-bits
! @opindex mno-early-stop-bits
! Allow stop bits to be placed earlier than immediately preceding the
! instruction that triggered the stop bit.  This can improve instruction
! scheduling, but does not always do so.
  @end table
  
  @node M32R/D Options
--- 8876,8909 ----
  two registers separated by a dash.  Multiple register ranges can be
  specified separated by a comma.
  
! @item -mtls-size=@var{tls-size}
! @opindex mtls-size
! Specify bit size of immediate TLS offsets.  Valid values are 14, 22, and
! 64.
! 
! @item -mtune-arch=@var{cpu-type}
! @opindex mtune-arch
! Tune the instruction scheduling for a particular CPU, Valid values are
! itanium, itanium1, merced, itanium2, and mckinley.
! 
! @item -mt
! @itemx -pthread
! @opindex mt
! @opindex pthread
! Add support for multithreading using the POSIX threads library.  This
! option sets flags for both the preprocessor and linker.  This option does
! not affect the thread safety of object code produced by the compiler or
! that of libraries supplied with it.  These are HP-UX specific flags.
! 
! @item -milp32
! @itemx -mlp64
! @opindex milp32
! @opindex mlp64
! Generate code for a 32-bit or 64-bit environment.
! The 32-bit environment sets int, long and pointer to 32 bits.
! The 64-bit environment sets int to 32 bits and long and pointer
! to 64 bits.  These are HP-UX specific flags.
! 
  @end table
  
  @node M32R/D Options