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Re: [BENCH] Improvements to popping x87 stack in reg-stack.c
- From: Uros Bizjak <uros at kss-loka dot si>
- To: Richard Henderson <rth at redhat dot com>
- Cc: Roger Sayle <roger at eyesopen dot com>, gcc-patches at gcc dot gnu dot org
- Date: Wed, 01 Dec 2004 10:11:24 +0100
- Subject: Re: [BENCH] Improvements to popping x87 stack in reg-stack.c
- References: <41AADBDD.2030706@kss-loka.si> <20041130021009.GB1489@redhat.com> <41AD850F.4090208@kss-loka.si> <20041201085122.GA6460@redhat.com>
Richard Henderson wrote:
"fstp r" has latency of 6, reciprocal throughput of 1, uses port 0 and
execution unit mov.
Surely that value is for a store to memory, not a register to
register move....
No, this is register to register move.
FP register to m32/m64 has a latency of 7, reciprocal throughput of 2-3,
uses port 0 and execution unit store.
FP reg to m80 is implemented in microcode, reciprocal throughput 8.
This data is from section 23.2 of Agner Fog's "How to optimize for the
Pentium family of microprocessors". I quote it here in the hope, the
data is correct.
Uros.