Index: darwin.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/darwin.c,v
retrieving revision 1.94
diff -u -p -r1.94 darwin.c
--- darwin.c	27 Oct 2004 23:01:55 -0000	1.94
+++ darwin.c	2 Nov 2004 04:23:10 -0000
@@ -412,12 +412,8 @@ machopic_indirect_data_reference (rtx or
       if (defined && MACHO_DYNAMIC_NO_PIC_P)
 	{
 #if defined (TARGET_TOC)
- 	  emit_insn (GET_MODE (orig) == DImode
-		     ? gen_macho_high_di (reg, orig)
-		     : gen_macho_high (reg, orig));
- 	  emit_insn (GET_MODE (orig) == DImode
-		     ? gen_macho_low_di (reg, reg, orig)
-		     : gen_macho_low (reg, reg, orig));
+ 	  emit_insn (gen_macho_high (reg, orig));
+ 	  emit_insn (gen_macho_low (reg, reg, orig));
 #else
 	   /* some other cpu -- writeme!  */
 	   abort ();
@@ -613,9 +609,7 @@ machopic_legitimize_pic_address (rtx ori
 	      rtx asym = XEXP (orig, 0);
 	      rtx mem;
 
-	      emit_insn (mode == DImode
-			 ? gen_macho_high_di (temp_reg, asym)
-			 : gen_macho_high (temp_reg, asym));
+	      emit_insn (gen_macho_high (temp_reg, asym));
 	      mem = gen_const_mem (GET_MODE (orig),
 				   gen_rtx_LO_SUM (Pmode, temp_reg, asym));
 	      emit_insn (gen_rtx_SET (VOIDmode, reg, mem));
Index: rs6000/darwin.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/darwin.md,v
retrieving revision 1.4
diff -u -p -r1.4 darwin.md
--- rs6000/darwin.md	18 Aug 2004 18:51:36 -0000	1.4
+++ rs6000/darwin.md	2 Nov 2004 04:23:11 -0000
@@ -147,7 +147,7 @@ Boston, MA 02111-1307, USA.  */
 
 (define_insn "load_macho_picbase_di"
   [(set (match_operand:DI 0 "register_operand" "=l")
-	(unspec:DI [(match_operand:DI 1 "immediate_operand" "s")] 15))]
+	(unspec:DI [(match_operand:DI 1 "immediate_operand" "s")] UNSPEC_LD_MPIC))]
   "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
   "bcl 20,31,%1\\n%1:"
   [(set_attr "type" "branch")
Index: rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.732
diff -u -p -r1.732 rs6000.c
--- rs6000/rs6000.c	28 Oct 2004 22:32:41 -0000	1.732
+++ rs6000/rs6000.c	2 Nov 2004 04:23:17 -0000
@@ -4441,16 +4441,8 @@ rs6000_emit_move (rtx dest, rtx source, 
 		  return;
 		}
 #endif
-	      if (mode == DImode)
-		{
-		  emit_insn (gen_macho_high_di (target, operands[1]));
-		  emit_insn (gen_macho_low_di (operands[0], target, operands[1]));
-		}
-	      else
-		{
-		  emit_insn (gen_macho_high (target, operands[1]));
-		  emit_insn (gen_macho_low (operands[0], target, operands[1]));
-		}
+	      emit_insn (gen_macho_high (target, operands[1]));
+	      emit_insn (gen_macho_low (operands[0], target, operands[1]));
 	      return;
 	    }
 
Index: rs6000/rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.327
diff -u -p -r1.327 rs6000.md
--- rs6000/rs6000.md	27 Oct 2004 20:18:42 -0000	1.327
+++ rs6000/rs6000.md	2 Nov 2004 04:23:23 -0000
@@ -7661,13 +7661,40 @@
     {ai|addic} %0,%1,%K2")
 
 ;; Mach-O PIC trickery.
-(define_insn "macho_high"
+(define_expand "macho_high"
+  [(set (match_operand 0 "" "")
+	(high (match_operand 1 "" "")))]
+  "TARGET_MACHO"
+{
+  if (TARGET_64BIT)
+    emit_insn (gen_macho_high_di (operands[0], operands[1]));
+  else
+    emit_insn (gen_macho_high_si (operands[0], operands[1]));
+
+  DONE;
+})
+
+(define_insn "macho_high_si"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=b*r")
 	(high:SI (match_operand 1 "" "")))]
   "TARGET_MACHO && ! TARGET_64BIT"
   "{liu|lis} %0,ha16(%1)")
+  
+(define_expand "macho_low"
+  [(set (match_operand 0 "" "")
+	(lo_sum (match_operand 1 "" "")
+		   (match_operand 2 "" "")))]
+   "TARGET_MACHO"
+{
+  if (TARGET_64BIT)
+    emit_insn (gen_macho_low_di (operands[0], operands[1], operands[2]));
+  else
+    emit_insn (gen_macho_low_si (operands[0], operands[1], operands[2]));
 
-(define_insn "macho_low"
+  DONE;
+})
+
+(define_insn "macho_low_si"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
 	(lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,!*r")
 		   (match_operand 2 "" "")))]
@@ -7756,7 +7783,7 @@
   [(set_attr "type" "store")
    (set_attr "length" "4")])
 
-(define_insn "movdf_low"
+(define_insn "movdf_low_si"
   [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
         (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
                            (match_operand 2 "" ""))))]
@@ -7798,7 +7825,7 @@
   [(set_attr "type" "load")
    (set_attr "length" "4,12")])
 
-(define_insn "movdf_low_st"
+(define_insn "movdf_low_st_si"
   [(set (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
                            (match_operand 2 "" "")))
 	(match_operand:DF 0 "gpc_reg_operand" "f"))]
@@ -7807,7 +7834,7 @@
   [(set_attr "type" "store")
    (set_attr "length" "4")])
 
-(define_insn "movsf_low"
+(define_insn "movsf_low_si"
   [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r")
         (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
                            (match_operand 2 "" ""))))]
@@ -7818,7 +7845,7 @@
   [(set_attr "type" "load")
    (set_attr "length" "4")])
 
-(define_insn "movsf_low_st"
+(define_insn "movsf_low_st_si"
   [(set (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b")
                            (match_operand 2 "" "")))
 	(match_operand:SF 0 "gpc_reg_operand" "f,!r"))]
@@ -10168,7 +10195,21 @@
   "{l|lwz} %0,%2-%3(%1)"
   [(set_attr "type" "load")])
 
-(define_insn "load_macho_picbase"
+(define_expand "load_macho_picbase"
+  [(set (match_operand 0 "" "")
+        (unspec [(match_operand 1 "" "")]
+                   UNSPEC_LD_MPIC))]
+  "(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
+{
+  if (TARGET_32BIT)
+    emit_insn (gen_load_macho_picbase_si (operands[0], operands[1]));
+  else
+    emit_insn (gen_load_macho_picbase_di (operands[0], operands[1]));
+
+  DONE;
+})
+
+(define_insn "load_macho_picbase_si"
   [(set (match_operand:SI 0 "register_operand" "=l")
 	(unspec:SI [(match_operand:SI 1 "immediate_operand" "s")]
 		   UNSPEC_LD_MPIC))]
@@ -10177,7 +10218,25 @@
   [(set_attr "type" "branch")
    (set_attr "length" "4")])
 
-(define_insn "macho_correct_pic"
+(define_expand "macho_correct_pic"
+  [(set (match_operand 0 "" "")
+	(plus (match_operand 1 "" "")
+		 (unspec [(match_operand 2 "" "")
+			     (match_operand 3 "" "")]
+			    UNSPEC_MPIC_CORRECT)))]
+  "DEFAULT_ABI == ABI_DARWIN"
+{
+  if (TARGET_32BIT)
+    emit_insn (gen_macho_correct_pic_si (operands[0], operands[1], operands[2],
+	       operands[3]));
+  else
+    emit_insn (gen_macho_correct_pic_di (operands[0], operands[1], operands[2],
+	       operands[3]));
+
+  DONE;
+})
+
+(define_insn "macho_correct_pic_si"
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
 	(plus:SI (match_operand:SI 1 "gpc_reg_operand" "r")
 		 (unspec:SI [(match_operand:SI 2 "immediate_operand" "s")
@@ -10212,12 +10271,8 @@
 				  CODE_LABEL_NUMBER (operands[0]));
       tmplabrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab));
 
-      emit_insn (TARGET_64BIT
-	 ? gen_load_macho_picbase_di (picreg, tmplabrtx)
-	 : gen_load_macho_picbase (picreg, tmplabrtx));
-      emit_insn (TARGET_64BIT
-	 ? gen_macho_correct_pic_di (picreg, picreg, picrtx, tmplabrtx)
-	 : gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
+      emit_insn (gen_load_macho_picbase (picreg, tmplabrtx));
+      emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
     }
   else
 #endif