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Re: [altivec]: More mode macros
- From: Daniel Jacobowitz <drow at false dot org>
- To: Nathan Sidwell <nathan at codesourcery dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>,Aldy Hernandez <aldyh at redhat dot com>,David Edelsohn <dje at watson dot ibm dot com>
- Date: Fri, 19 Nov 2004 10:06:10 -0500
- Subject: Re: [altivec]: More mode macros
- References: <419DC43F.20407@codesourcery.com>
On Fri, Nov 19, 2004 at 10:00:31AM +0000, Nathan Sidwell wrote:
> ! ;; builtin_altivec_vandc (a, b) computes a & ~b, gcc's
> ! ;; canonicalization of that has the operands the other way round
> ! (define_expand "altivec_vandc"
> ! [(set (match_operand:V4SI 0 "register_operand" "=v")
> ! (and:V4SI (not:V4SI (match_operand:V4SI 2 "register_operand" "v"))
> ! (match_operand:V4SI 1 "register_operand" "v")))]
> ! "TARGET_ALTIVEC")
> !
> ! (define_insn "*andc<mode>3"
> ! [(set (match_operand:VI 0 "register_operand" "=v")
> ! (and:VI (not:VI (match_operand:VI 1 "register_operand" "v"))
> ! (match_operand:VI 2 "register_operand" "v")))]
> "TARGET_ALTIVEC"
> ! "vandc %0,%2,%1"
> [(set_attr "type" "vecsimple")])
>
> (define_insn "altivec_vpkuhum"
Is there some reason why you can't just do:
(define_insn "*andc<mode>3"
[(set (match_operand:VI 0 "register_operand" "=v")
(and:VI (not:VI (match_operand:VI 2 "register_operand" "v"))
(match_operand:VI 1 "register_operand" "v")))]
i.e. just switch the operand numbers in the insn?
--
Daniel Jacobowitz