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[PATCH, take 2] Fix PR 18503


Hello!

This patch fixes PR18503, including "sse2_movhpd" issues. The code from previous testcases now produces expected results for all optimization levels.

The problem is, that sse_movss, sse2_movsd and sse2_movhpd patterns have wrong vec_merge selector bitmask. After fixing these, a problem with _mm_storel_pd() intrinsic function arised:

/usr/local.uros/lib/gcc/i686-pc-linux-gnu/4.0.0/include/emmintrin.h: In
function "_mm_storel_pd"
/usr/local.uros/lib/gcc/i686-pc-linux-gnu/4.0.0/include/emmintrin.h:959: interna
l compiler error: in instantiate_virtual_regs_lossage, at function.c:1441
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.


This issue was fixed by splitting current sse2_movsd pattern back into movsd and movlpd part, where movlpd insn is generated in the same way as movupd insn.

Patch was bootstrapped and regtested on i686-pc-linux-gnu

BTW: This bug is also present in 3.3.x and 3.4.x gcc releases.

2004-11-18 Uros Bizjak <uros@kss-loka.si>

   PR target/18503
   * configure/i386/i386.c (ix86_expand_builtin)
   [IX86_BUILTIN_LOADHPD, IX86_BUILTIN_STOREHPD]: Use
   CODE_FOR_sse2_movlpd.
   * configure/i386/i386.md (sse_movss, sse2_movsd, sse2_movhpd):
   Fix wrong vec_merge selector bitmask.
   (sse2_movsd): Do not generate movlpd insn.
   (sse2_movlpd): New pattern.

Uros.

Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.741
diff -u -p -r1.741 i386.c
--- config/i386/i386.c	18 Nov 2004 01:55:21 -0000	1.741
+++ config/i386/i386.c	18 Nov 2004 10:54:42 -0000
@@ -13301,7 +13301,7 @@ ix86_expand_builtin (tree exp, rtx targe
       icode = (fcode == IX86_BUILTIN_LOADHPS ? CODE_FOR_sse_movhps
 	       : fcode == IX86_BUILTIN_LOADLPS ? CODE_FOR_sse_movlps
 	       : fcode == IX86_BUILTIN_LOADHPD ? CODE_FOR_sse2_movhpd
-	       : CODE_FOR_sse2_movsd);
+	       : CODE_FOR_sse2_movlpd);
       arg0 = TREE_VALUE (arglist);
       arg1 = TREE_VALUE (TREE_CHAIN (arglist));
       op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
@@ -13330,7 +13330,7 @@ ix86_expand_builtin (tree exp, rtx targe
       icode = (fcode == IX86_BUILTIN_STOREHPS ? CODE_FOR_sse_movhps
 	       : fcode == IX86_BUILTIN_STORELPS ? CODE_FOR_sse_movlps
 	       : fcode == IX86_BUILTIN_STOREHPD ? CODE_FOR_sse2_movhpd
-	       : CODE_FOR_sse2_movsd);
+	       : CODE_FOR_sse2_movlpd);
       arg0 = TREE_VALUE (arglist);
       arg1 = TREE_VALUE (TREE_CHAIN (arglist));
       op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.563
diff -u -p -r1.563 i386.md
--- config/i386/i386.md	18 Nov 2004 07:34:55 -0000	1.563
+++ config/i386/i386.md	18 Nov 2004 10:54:45 -0000
@@ -20817,7 +20817,7 @@
 	(vec_merge:V4SF
 	 (match_operand:V4SF 1 "register_operand" "0")
 	 (match_operand:V4SF 2 "register_operand" "x")
-	 (const_int 1)))]
+	 (const_int 14)))]
   "TARGET_SSE"
   "movss\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssemov")
@@ -24247,12 +24247,23 @@
 	(vec_merge:V2DF
 	 (match_operand:V2DF 1 "nonimmediate_operand" "0,0")
 	 (match_operand:V2DF 2 "nonimmediate_operand" "m,x")
-	 (const_int 2)))]
+	 (const_int 1)))]
   "TARGET_SSE2 && (GET_CODE (operands[1]) == MEM || GET_CODE (operands[2]) == MEM)"
   "movhpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "V2DF")])
 
+(define_insn "sse2_movlpd"
+  [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m")
+	(vec_merge:V2DF
+	 (match_operand:V2DF 1 "nonimmediate_operand" "0,0")
+	 (match_operand:V2DF 2 "nonimmediate_operand" "m,x")
+	 (const_int 2)))]
+  "TARGET_SSE2 && (GET_CODE (operands[1]) == MEM || GET_CODE (operands[2]) == MEM)"
+  "movlpd\t{%2, %0|%0, %2}"
+  [(set_attr "type" "ssecvt")
+   (set_attr "mode" "V2DF")])
+
 (define_expand "sse2_loadsd"
   [(match_operand:V2DF 0 "register_operand" "")
    (match_operand:DF 1 "memory_operand" "")]
@@ -24275,17 +24286,15 @@
    (set_attr "mode" "DF")])
 
 (define_insn "sse2_movsd"
-  [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,m")
+  [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x")
 	(vec_merge:V2DF
-	 (match_operand:V2DF 1 "nonimmediate_operand" "0,0,0")
-	 (match_operand:V2DF 2 "nonimmediate_operand" "x,m,x")
-	 (const_int 1)))]
+	 (match_operand:V2DF 1 "nonimmediate_operand" "0")
+	 (match_operand:V2DF 2 "nonimmediate_operand" "x")
+	 (const_int 2)))]
   "TARGET_SSE2 && ix86_binary_operator_ok (UNKNOWN, V2DFmode, operands)"
-  "@movsd\t{%2, %0|%0, %2}
-    movlpd\t{%2, %0|%0, %2}
-    movlpd\t{%2, %0|%0, %2}"
+  "movsd\t{%2, %0|%0, %2}"
   [(set_attr "type" "ssecvt")
-   (set_attr "mode" "DF,V2DF,V2DF")])
+   (set_attr "mode" "DF")])
 
 (define_insn "sse2_storesd"
   [(set (match_operand:DF 0 "memory_operand" "=m")

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