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Re: [patch]: Fix 16457, missed ppc optimization

Alan Modra wrote:
On Mon, Nov 08, 2004 at 04:28:16PM +0000, Nathan Sidwell wrote:

+       /* We can use a single rlwinm insn if no upper bits of C are set
+          AND there are zero, one or two transitions in the _whole_ of
+          C.  */

Are you sure about this?  rlwinm rt,rs,0,mb,me performs an AND operation
using a mask generated with 1's from bit mb+32 to me+32.  When mb is
larger than me, the mask wraps around and you get all 1's in the upper
32 bits.  What's more, the low 32 bit word of rs is duplicated in the
high 32 bit word before the AND operation.

  li 9,3
  rlwinm 10,9,0,31,0	# r10 = r9 & 0x80000001 ???

will result in r10 = 0x300000001

you are correct -- and a misleading comment in the ppc isa manual I had sent me in a wrong direction when developing this patch. The above comment is correct, the WHOLE (more emphasis added :) 64 bits of C must have no more that two transitions, AND the upper 32 bits must be zero. The value '0x80000001' has THREE transitions when you zero extend it to 64 bits. If you sign extend it then it will not have zero upper bits. The testsuite already has a test case to make sure that 0x80000001 is treated properly (gcc.c-torture/execute/20020225-1.c).


Nathan Sidwell    ::   ::     CodeSourcery LLC    ::

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