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Re: improve unaligned loads with no special insns
- From: kenner at vlsi1 dot ultra dot nyu dot edu (Richard Kenner)
- To: rth at redhat dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Sat, 6 Nov 04 15:12:59 EST
- Subject: Re: improve unaligned loads with no special insns
> Because you're only going to be looking at the part relevant for the
> field, can't you set MEM_ALIAS_SET and perhaps even MEM_EXPR accordingly?
No. For the same reason that Alpha AND addresses can't.
Those addresses can't because they are sometimes used for *stores* where
you do care. But I don't understand how you can have a problem when you
are only *reading* the values. Are you concerned about CSE'ing those
loads with loads where a different set of bits is used? Can you give
an example where it matters?
I'm concerned about pessimizing the code by having the alias set zero:
it could well be faster to have better-scheduled multiple loads
(especially since most will be known to be cache hits) than fewer
loads that cause conflicts preventing better scheduling.