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Re: [arm] Add new cores.

From: Richard Earnshaw <rearnsha at arm dot com>
To: Paul Brook <paul at codesourcery dot com>
Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>, Mark Mitchell <mark at codesourcery dot com>
Date: Tue, 12 Oct 2004 11:57:20 +0100
Subject: Re: [arm] Add new cores.
References: <200409302222.19522.paul@codesourcery.com>
On Thu, 2004-09-30 at 22:22, Paul Brook wrote:
> The patch below adds support for new arm cpu cores, and the architectures they 
> implement. The don't actually add anything new from a compiler perspective, 
> just add a few new low-level OS instructions.
> 
> Tested with cross to arm-unknown-eabi.
> Ok for mainline and csl-arm-branch?
> 
> Paul

OK for mainline with the following correction:

The core names are arm1176jz-s and arm1176jzf-s -- you've missed the
hyphen out in the documentation.

R.

> 
> 2004-09-30  Paul Brook  <paul@coudesourcery.com>
> 
>  * config.gcc: Add armv6{k,z,zk}
>  * config/arm/arm-cores.def: Add arm1176 and mpcore.
>  * config/arm/tune.md: Regenerate.
>  * config/arm/arm.c (FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK):
>  Define.
>  (all_architectures): Add armv6k, armv6z, armv6zk.
>  * config/arm/lib1funcs.asm: Recognise new arm arcitectures.
>  * doc/invoke.texi: Document new arch and cpu values.
> 
> Index: config.gcc
> ===================================================================
> RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config.gcc,v
> retrieving revision 1.492
> diff -u -p -r1.492 config.gcc
> --- config.gcc 24 Sep 2004 06:17:00 -0000 1.492
> +++ config.gcc 30 Sep 2004 21:01:07 -0000
> @@ -2310,7 +2310,8 @@ fi
>    case "$with_arch" in
>    "" \
>    | armv[23456] | armv2a | armv3m | armv4t | armv5t \
> -  | armv5te | armv6j | iwmmxt | ep9312)
> +  | armv5te | armv6j |armv6k | armv6z | armv6zk \
> +  | iwmmxt | ep9312)
>     # OK
>     ;;
>    *)
> Index: config/arm/arm-cores.def
> ===================================================================
> RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm-cores.def,v
> retrieving revision 1.9
> diff -u -p -r1.9 arm-cores.def
> --- config/arm/arm-cores.def 18 Sep 2004 19:19:30 -0000 1.9
> +++ config/arm/arm-cores.def 30 Sep 2004 20:36:09 -0000
> @@ -111,3 +111,7 @@ ARM_CORE("arm1026ej-s",   arm1026ejs, 5T
>  /* V6 Architecture Processors */
>  ARM_CORE("arm1136j-s",    arm1136js, 6J,                          0, 9e)
>  ARM_CORE("arm1136jf-s",   arm1136jfs, 6J,                          FL_VFPV2, 
> 9e)
> +ARM_CORE("arm1176jz-s",	  arm1176jzs,	6ZK,				 0, 9e)
> +ARM_CORE("arm1176jzf-s",  arm1176jzfs,	6ZK,				 FL_VFPV2, 9e)
> +ARM_CORE("mpcorenovfp",	  mpcorenovfp,	6K,				 0, 9e)
> +ARM_CORE("mpcore",	  mpcore,	6K,				 FL_VFPV2, 9e)
> Index: config/arm/arm-tune.md
> ===================================================================
> RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm-tune.md,v
> retrieving revision 1.3
> diff -u -p -r1.3 arm-tune.md
> --- config/arm/arm-tune.md	1 Sep 2004 12:49:30 -0000	1.3
> +++ config/arm/arm-tune.md	30 Sep 2004 17:09:42 -0000
> @@ -1,5 +1,5 @@
>  ;; -*- buffer-read-only: t -*-
>  ;; Generated automatically by gentune.sh from arm-cores.def
>  (define_attr "tune"
> -	"arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,arm926ejs,arm1026ejs,arm1136js,arm1136jfs"
> +	"arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore"
>  	(const (symbol_ref "arm_tune")))
> Index: config/arm/arm.c
> ===================================================================
> RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm.c,v
> retrieving revision 1.407
> diff -u -p -r1.407 arm.c
> --- config/arm/arm.c	18 Sep 2004 19:19:30 -0000	1.407
> +++ config/arm/arm.c	30 Sep 2004 20:36:09 -0000
> @@ -387,6 +387,9 @@ int    arm_structure_size_boundary = DEF
>  #define FL_FOR_ARCH5TEJ	FL_FOR_ARCH5TE
>  #define FL_FOR_ARCH6	(FL_FOR_ARCH5TE | FL_ARCH6)
>  #define FL_FOR_ARCH6J	FL_FOR_ARCH6
> +#define FL_FOR_ARCH6K	FL_FOR_ARCH6
> +#define FL_FOR_ARCH6Z	FL_FOR_ARCH6
> +#define FL_FOR_ARCH6ZK	FL_FOR_ARCH6
>  
>  /* The bits in this mask specify which
>     instructions we are allowed to generate.  */
> @@ -526,6 +529,9 @@ static const struct processors all_archi
>    {"armv5te", arm1026ejs, "5TE", FL_CO_PROC |             FL_FOR_ARCH5TE, 
> NULL},
>    {"armv6",   arm1136js,  "6",   FL_CO_PROC |             FL_FOR_ARCH6, 
> NULL},
>    {"armv6j",  arm1136js,  "6J",  FL_CO_PROC |             FL_FOR_ARCH6J, 
> NULL},
> +  {"armv6k",  mpcore,   "6K",  FL_CO_PROC |             FL_FOR_ARCH6K, NULL},
> +  {"armv6z",  arm1176jzs, "6Z",  FL_CO_PROC |             FL_FOR_ARCH6Z, 
> NULL},
> +  {"armv6zk", arm1176jzs, "6ZK", FL_CO_PROC |             FL_FOR_ARCH6ZK, 
> NULL},
>    {"ep9312",  ep9312,     "4T",  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, 
> NULL},
>    {"iwmmxt",  iwmmxt,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | 
> FL_XSCALE | FL_IWMMXT , NULL},
>    {NULL, arm_none, NULL, 0 , NULL}
> Index: config/arm/lib1funcs.asm
> ===================================================================
> RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/lib1funcs.asm,v
> retrieving revision 1.34
> diff -u -p -r1.34 lib1funcs.asm
> --- config/arm/lib1funcs.asm 1 Sep 2004 06:08:34 -0000 1.34
> +++ config/arm/lib1funcs.asm 30 Sep 2004 21:16:34 -0000
> @@ -80,7 +80,9 @@ Boston, MA 02111-1307, USA.  */
>  # define __ARM_ARCH__ 5
>  #endif
>  
> -#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__)
> +#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
> + || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
> + || defined(__ARM_ARCH_6ZK__)
>  # undef __ARM_ARCH__
>  # define __ARM_ARCH__ 6
>  #endif
> Index: doc/invoke.texi
> ===================================================================
> RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/doc/invoke.texi,v
> retrieving revision 1.542
> diff -u -p -r1.542 invoke.texi
> --- doc/invoke.texi 24 Sep 2004 23:18:01 -0000 1.542
> +++ doc/invoke.texi 30 Sep 2004 20:45:00 -0000
> @@ -6777,7 +6777,8 @@ assembly code.  Permissible names are: @
>  @samp{arm968e-s}, @samp{arm926ej-s}, @samp{arm940t}, @samp{arm9tdmi},
>  @samp{arm10tdmi}, @samp{arm1020t}, @samp{arm1026ej-s},
>  @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
> -@samp{arm1136j-s}, @samp{arm1136jf-s} ,@samp{xscale}, @samp{iwmmxt},
> +@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
> +@samp{arm1176jzs}, @samp{arm1176jzfs}, @samp{xscale}, @samp{iwmmxt},
>  @samp{ep9312}.
>  
>  @itemx -mtune=@var{name}
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