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[PATCH/RFA] SH: builtin-prefetch test failures
- From: Kaz Kojima <kkojima at rr dot iij4u dot or dot jp>
- To: gcc-patches at gcc dot gnu dot org
- Cc: amylaar at spamcop dot net, aoliva at redhat dot com
- Date: Fri, 08 Oct 2004 13:23:57 +0900 (JST)
- Subject: [PATCH/RFA] SH: builtin-prefetch test failures
Hi,
gcc.c-torture/execute/builtin-prefetch-[2345].c fails for sh-elf -ml -m4
and sh4-unknown-linux-gnu with
internal compiler error: output_operand: invalid expression as operand
The first operand of the prefetch insn in sh.md allows any address_operand
though "pref @%0" instruction allows a simple register oparand only.
I saw that the operands[0] is a PLUS expression for the above failed
case. The appended patch uses an expander and copy operands[0] to a
register in such situation.
It's tested with bootstrapping and the toplevel make -k check on
sh4-unknown-linux-gnu with no new failure. It is also regtested on
i686-linux cross sh64-unknown-elf.
Regards,
kaz
--
2004-10-07 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.md (prefetch_media, prefetch_i4): New insns.
(prefetch): Convert to expander.
diff -uprN ORIG/gcc/gcc/config/sh/sh.md LOCAL/gcc/gcc/config/sh/sh.md
--- ORIG/gcc/gcc/config/sh/sh.md 2004-09-18 06:36:01.000000000 +0900
+++ LOCAL/gcc/gcc/config/sh/sh.md 2004-10-08 07:59:07.000000000 +0900
@@ -10951,17 +10951,45 @@ mov.l\\t1f,r0\\n\\
"byterev %1, %0"
[(set_attr "type" "arith_media")])
-(define_insn "prefetch"
+(define_insn "prefetch_media"
[(prefetch (match_operand:QI 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n")
(match_operand:SI 2 "const_int_operand" "n"))]
- "TARGET_SHMEDIA || TARGET_HARD_SH4"
+ "TARGET_SHMEDIA"
"*
{
- if (TARGET_HARD_SH4)
- return \"pref @%0\";
operands[0] = gen_rtx_MEM (QImode, operands[0]);
output_asm_insn (\"ld%M0.b %m0,r63\", operands);
return \"\";
}"
[(set_attr "type" "other")])
+
+(define_insn "prefetch_i4"
+ [(prefetch (match_operand:SI 0 "register_operand" "r")
+ (match_operand:SI 1 "const_int_operand" "n")
+ (match_operand:SI 2 "const_int_operand" "n"))]
+ "TARGET_HARD_SH4"
+ "*
+{
+ return \"pref @%0\";
+}"
+ [(set_attr "type" "other")])
+
+(define_expand "prefetch"
+ [(prefetch (match_operand:QI 0 "address_operand" "p")
+ (match_operand:SI 1 "const_int_operand" "n")
+ (match_operand:SI 2 "const_int_operand" "n"))]
+ "TARGET_SHMEDIA || TARGET_HARD_SH4"
+ "
+{
+ if (TARGET_HARD_SH4 && ! register_operand (operands[0], SImode))
+ {
+ rtx reg = gen_reg_rtx (SImode);
+ emit_move_insn (reg, operands[0]);
+ operands[0] = reg;
+ }
+
+ emit_insn ((TARGET_SHMEDIA ? gen_prefetch_media : gen_prefetch_i4)
+ (operands[0], operands[1], operands[2]));
+ DONE;
+}")