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Re: [arm] Fix contraints on addsi3_cbranch_scratch


On Tuesday 05 October 2004 14:08, Paul Brook wrote:
> The following patch fixes the constaints on the thumb
> addsi3_cbranch_scratch pattern. It looks like these were reversed (the two
> argument allows a larger immediate operand). This was causing the folloing
> thumb filure on
> arm-noneeabi:
>
> FAIL: gcc.c-torture/execute/20000412-4.c compilation,  -O3
> -fomit-frame-pointer
>
> I also changed the output code to correctly handle negative constants using
> the "sub" instructions.
>
> Tested with cross to arm-none-eabi.
> Ok?

2004-01-01  Paul Brook  <paul@codesourcery.com>

 * config/arm/arm.md (addsi3_cbranch_scratch): Correct constraints.
 Handle negative constants.

Index: config/arm/arm.md
===================================================================
RCS file: /var/cvsroot/gcc-cvs/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.145.2.26
diff -u -p -r1.145.2.26 arm.md
--- config/arm/arm.md 25 Aug 2004 16:07:35 -0000 1.145.2.26
+++ config/arm/arm.md 1 Oct 2004 17:58:52 -0000
@@ -6319,7 +6319,7 @@
   (match_operator 3 "comparison_operator"
    [(plus:SI
      (match_operand:SI 1 "s_register_operand" "%l,l,l,0")
-     (match_operand:SI 2 "reg_or_int_operand" "J,l,I,L"))
+     (match_operand:SI 2 "reg_or_int_operand" "J,l,L,IJ"))
     (const_int 0)])
   (label_ref (match_operand 4 "" ""))
   (pc)))
@@ -6340,10 +6340,16 @@
   output_asm_insn (\"cmn\t%1, %2\", operands);
   break;
        case 2:
-  output_asm_insn (\"add\t%0, %1, %2\", operands);
+  if (INTVAL (operands[2]) < 0)
+    output_asm_insn (\"sub\t%0, %1, %2\", operands);
+  else
+    output_asm_insn (\"add\t%0, %1, %2\", operands);
   break;
        case 3:
-  output_asm_insn (\"add\t%0, %0, %2\", operands);
+  if (INTVAL (operands[2]) < 0)
+    output_asm_insn (\"sub\t%0, %0, %2\", operands);
+  else
+    output_asm_insn (\"add\t%0, %0, %2\", operands);
   break;
        }
 


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