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Re: RFC: Using (set (if_then_else ...)) on IA64 for division instructions
- From: Steve Ellcey <sje at cup dot hp dot com>
- To: rth at redhat dot com
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Wed, 29 Sep 2004 10:39:30 -0700 (PDT)
- Subject: Re: RFC: Using (set (if_then_else ...)) on IA64 for division instructions
> On Wed, Sep 29, 2004 at 09:07:25AM -0700, Steve Ellcey wrote:
> > I have been looking at how we generate code to do division on IA64 to
> > see if I could get it to be scheduled better. Currently IA64 generates
> > a sequence of instructions using cond_exec, the problem with this is
> > that cond_exec cannot be expanded until after reload and this results in
> > the division instruction sequence being poorly scheduled.
>
> I'm surprised you aren't getting decent results with flag_rename_registers.
For '(a/b)+(c/d)' flag_rename_registers does rename a predicate register
but it doesn't rename any of the floating point registers so it wasn't
able to change the scheduling.
I think (but am not sure) that the use of cond_exec may be interfering
with regrename's ability to understand the real lifetimes of the
floating point registers. It thinks that each use of a register could
be linked all previous definitions because intervening definitions are
conditional and thus may or may not happen.
Steve Ellcey
sje@cup.hp.com